Please change MmioRead8 () to PciSegmentRead8 () since the address is derived from PCI_SEGMENT_LIB_ADDRESS ().
> -----Original Message----- > From: Desimone, Nathaniel L <nathaniel.l.desim...@intel.com> > Sent: Wednesday, October 2, 2019 12:36 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel <chasel.c...@intel.com>; Kubacki, Michael A > <michael.a.kuba...@intel.com>; Chaganty, Rangasai V > <rangasai.v.chaga...@intel.com> > Subject: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS > bit ASSERT > > Current ASSERT logic checks that the EISS bit is still set after we clear it. > This is > incorrect, it should be checking that that the EISS bit is clear after we > clear it. > > Cc: Chasel Chiu <chasel.c...@intel.com> > Cc: Michael Kubacki <michael.a.kuba...@intel.com> > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Signed-off-by: Nate DeSimone <nathaniel.l.desim...@intel.com> > --- > .../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git > a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c > b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c > index aadc367a9f..5fb667dc4a 100644 > --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c > +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c > @@ -184,7 +184,7 @@ DisableBiosWriteProtect ( > B_PCH_SPI_BC_WPD ); - ASSERT ((PciSegmentRead8 (SpiBaseAddress + > R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+ ASSERT ((MmioRead8 > (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0); return > EFI_SUCCESS; }-- > 2.23.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#48407): https://edk2.groups.io/g/devel/message/48407 Mute This Topic: https://groups.io/mt/34367405/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
