Cc: Michael Kubacki <michael.a.kuba...@intel.com>
Cc: Chasel Chiu <chasel.c...@intel.com>
Cc: Liming Gao <liming....@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desim...@intel.com>
---
.../Intel/MinPlatformPkg/MinPlatformPkg.dec | 283 +++++++++---------
1 file changed, 140 insertions(+), 143 deletions(-)
diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index fb069145ce..6ef0219129 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -14,186 +14,184 @@
[Defines]
-DEC_SPECIFICATION = 0x00010017
-PACKAGE_NAME = MinPlatformPkg
-PACKAGE_VERSION = 0.1
-PACKAGE_GUID = 463B3B00-0D18-4a5f-90C0-D5B851D2574B
-
+ DEC_SPECIFICATION = 0x00010017
+ PACKAGE_NAME = MinPlatformPkg
+ PACKAGE_VERSION = 0.1
+ PACKAGE_GUID = 463B3B00-0D18-4a5f-90C0-D5B851D2574B
[Includes]
-Include
+ Include
[Ppis]
-gEdkiiSiliconInitializedPpiGuid = {0x82a72dc8, 0x61ec, 0x403e, {0xb1, 0x5a,
0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}}
+ gEdkiiSiliconInitializedPpiGuid = {0x82a72dc8, 0x61ec, 0x403e, {0xb1,
0x5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}}
-gPeiBaseMemoryTestPpiGuid = { 0xb6ec423c, 0x21d2, 0x490d, { 0x85, 0xc6,
0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74 } }
-gPeiPlatformMemorySizePpiGuid = { 0x9a7ef41e, 0xc140, 0x4bd1, { 0xb8, 0x84,
0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6 } }
+ gPeiBaseMemoryTestPpiGuid = {0xb6ec423c, 0x21d2, 0x490d, {0x85,
0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74}}
+ gPeiPlatformMemorySizePpiGuid = {0x9a7ef41e, 0xc140, 0x4bd1, {0xb8,
0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6}}
[Guids]
-gMinPlatformPkgTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa,
0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
+ gMinPlatformPkgTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa,
0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
-gAdapterInfoPlatformTestPointGuid = {0x5381e3ea, 0xb77, 0x4580, {0xad, 0xdf,
0xa9, 0x1c, 0x8, 0x3b, 0xf2, 0x97}}
+ gAdapterInfoPlatformTestPointGuid = {0x5381e3ea, 0x0b77, 0x4580, {0xad,
0xdf, 0xa9, 0x1c, 0x08, 0x3b, 0xf2, 0x97}}
-gBoardDetectGuid = {0x1792429d, 0x9d94, 0x4e08, {0xa0, 0x99, 0x73,
0xa2, 0x86, 0xae, 0xb4, 0x35}}
-gBoardPreMemInitGuid = {0x191dcfcf, 0xe16e, 0x43bb, {0x9b, 0xc3, 0x6e,
0xee, 0x6f, 0xab, 0x3a, 0x27}}
-gBoardPostMemInitGuid = {0xa0e933ea, 0xa69, 0x47fb, {0xb2, 0xab, 0xa1,
0x6f, 0x71, 0x2d, 0x6f, 0x58}}
-gBoardNotificationInitGuid = {0x78dbcabf, 0xc544, 0x4e6f, {0xaf, 0x3a, 0x71,
0x17, 0xd9, 0x42, 0x4e, 0xd1}}
+ gBoardDetectGuid = {0x1792429d, 0x9d94, 0x4e08, {0xa0,
0x99, 0x73, 0xa2, 0x86, 0xae, 0xb4, 0x35}}
+ gBoardPreMemInitGuid = {0x191dcfcf, 0xe16e, 0x43bb, {0x9b,
0xc3, 0x6e, 0xee, 0x6f, 0xab, 0x3a, 0x27}}
+ gBoardPostMemInitGuid = {0xa0e933ea, 0xa69, 0x47fb, {0xb2,
0xab, 0xa1, 0x6f, 0x71, 0x2d, 0x6f, 0x58}}
+ gBoardNotificationInitGuid = {0x78dbcabf, 0xc544, 0x4e6f, {0xaf,
0x3a, 0x71, 0x17, 0xd9, 0x42, 0x4e, 0xd1}}
-gBoardAcpiTableGuid = {0xd70e9f57, 0x69f, 0x4bef, {0x96, 0xc0, 0x84,
0x74, 0xf4, 0xa2, 0x5f, 0x3a}}
-gBoardAcpiEnableGuid = {0x9727b610, 0xf645, 0x4429, {0x89, 0x21, 0x2c,
0x2b, 0x58, 0xdc, 0xbb, 0xa}}
+ gBoardAcpiTableGuid = {0xd70e9f57, 0x69f, 0x4bef, {0x96,
0xc0, 0x84, 0x74, 0xf4, 0xa2, 0x5f, 0x3a}}
+ gBoardAcpiEnableGuid = {0x9727b610, 0xf645, 0x4429, {0x89,
0x21, 0x2c, 0x2b, 0x58, 0xdc, 0xbb, 0x0a}}
-gDefaultDataFileGuid = { 0x1ae42876, 0x008f, 0x4161, {
0xb2, 0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43 }}
-gDefaultDataOptSizeFileGuid = { 0x003e7b41, 0x98a2, 0x4be2, {
0xb2, 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25 }}
+ gDefaultDataFileGuid = {0x1ae42876, 0x008f, 0x4161, {0xb2,
0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43}}
+ gDefaultDataOptSizeFileGuid = {0x003e7b41, 0x98a2, 0x4be2, {0xb2,
0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25}}
[LibraryClasses]
-PeiLib|Include/Library/PeiLib.h
+ PeiLib|Include/Library/PeiLib.h
-AslUpdateLib|Include/Library/AslUpdateLib.h
-BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h
-BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h
+ AslUpdateLib|Include/Library/AslUpdateLib.h
+ BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h
+ BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h
-SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h
-SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h
+ SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h
+ SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h
-SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
+ SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
-BoardInitLib|Include/Library/BoardInitLib.h
-MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h
-SecBoardInitLib|Include/Library/SecBoardInitLib.h
+ BoardInitLib|Include/Library/BoardInitLib.h
+ MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h
+ SecBoardInitLib|Include/Library/SecBoardInitLib.h
-TpmPlatformHierarchyLib|Include/Library/TpmPlatformHierarchyLib.h
+ TpmPlatformHierarchyLib|Include/Library/TpmPlatformHierarchyLib.h
-TestPointLib|Include/Library/TestPointLib.h
-TestPointCheckLib|Include/Library/TestPointCheckLib.h
+ TestPointLib|Include/Library/TestPointLib.h
+ TestPointCheckLib|Include/Library/TestPointCheckLib.h
SetCacheMtrrLib|Include/Library/SetCacheMtrrLib.h
[PcdsFixedAtBuild, PcdsPatchableInModule]
-gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
-gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
-gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002
+ gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
+
gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
+
gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002
-gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32|0x9000000B
-gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0x9000000C
+
gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32|0x9000000B
+ gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0x9000000C
-gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0x9000000D
-gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x9000000E
-gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014
+ gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0x9000000D
+ gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x9000000E
+ gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014
-gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012
-gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012
+ gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013
-gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015
-gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000016
-gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UINT32|0x90000017
-gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x90000018
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000016
+
gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UINT32|0x90000017
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x90000018
-gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90000021
-gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022
-gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023
+ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90000021
+ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022
+ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023
-gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025
-gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026
-gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027
-gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500
-gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501
-gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502
-gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503
-gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504
+
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500
+
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501
+
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502
+
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503
+
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504
-#
-# The PCDs are used to control the Windows SMM Security Mitigations Table -
Protection Flags
-#
-# BIT0: If set, expresses that for all synchronous SMM entries,SMM will
validate that input and output buffers lie entirely within the expected fixed
memory regions.
-# BIT1: If set, expresses that for all synchronous SMM entries, SMM will
validate that input and output pointers embedded within the fixed communication
buffer only refer to address ranges \
-# that lie entirely within the expected fixed memory regions.
-# BIT2: Firmware setting this bit is an indication that it will not allow
reconfiguration of system resources via non-architectural mechanisms.
-# BIT3-31: Reserved
-#
-gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006
+ #
+ # The PCDs are used to control the Windows SMM Security Mitigations Table -
Protection Flags
+ #
+ # BIT0: If set, expresses that for all synchronous SMM entries,SMM will
validate that input and output buffers lie entirely within the expected fixed
memory regions.
+ # BIT1: If set, expresses that for all synchronous SMM entries, SMM will
validate that input and output pointers embedded within the fixed communication
buffer only refer to address ranges \
+ # that lie entirely within the expected fixed memory regions.
+ # BIT2: Firmware setting this bit is an indication that it will not allow
reconfiguration of system resources via non-architectural mechanisms.
+ # BIT3-31: Reserved
+ #
+ gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006
-gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206
+
gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206
-#
-# See HstiIbvFeatureBit.h for the definition
-#
-# #define HSTI_BYTE<X>_<AAA> BIT<Y>
-#
-# It means BYTE<X> BIT<Y> is for feature <AAA>.
-#
-gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00,
0x00}|VOID*|0x00100301
+ #
+ # See HstiIbvFeatureBit.h for the definition
+ #
+ # #define HSTI_BYTE<X>_<AAA> BIT<Y>
+ #
+ # It means BYTE<X> BIT<Y> is for feature <AAA>.
+ #
+ gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00,
0x00}|VOID*|0x00100301
-#
-# See TestPointCheckLib.h for the definition
-#
-# #define TEST_POINT_BYTE<X>_<AAA> BIT<Y>
-#
-# It means BYTE<X> BIT<Y> is for feature <AAA>.
-# BYTE0 BYTE1
BYTE2 BYTE3 BYTE4 BYTE5 BYTE6 BYTE7 BYTE8
-# Stage debug: {0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
-# Stage memory: {0x03, 0x07,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
-# Stage UEFI boot: {0x03, 0x07,
0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
-# Stage OS boot: {0x03, 0x07,
0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
-# Stage Secure boot: {0x03, 0x0F,
0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
-# Stage Advanced: {0x03, 0x0F,
0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
-gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F,
0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}|VOID*|0x00100302
+ #
+ # See TestPointCheckLib.h for the definition
+ #
+ # #define TEST_POINT_BYTE<X>_<AAA> BIT<Y>
+ #
+ # It means BYTE<X> BIT<Y> is for feature <AAA>.
+ # BYTE0 BYTE1
BYTE2 BYTE3 BYTE4 BYTE5 BYTE6 BYTE7 BYTE8
+ # Stage debug: {0x03, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
+ # Stage memory: {0x03, 0x07,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
+ # Stage UEFI boot: {0x03, 0x07,
0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
+ # Stage OS boot: {0x03, 0x07,
0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
+ # Stage Secure boot: {0x03, 0x0F,
0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
+ # Stage Advanced: {0x03, 0x0F,
0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
+ gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F,
0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}|VOID*|0x00100302
-[PcdsFixedAtBuild, PcdsPatchableInModule]
-##
-## The Flash relevant PCD are ineffective and will be patched basing on FDF
definitions during build.
-## Set all of them to 0 here to prevent from confusion.
-##
-gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
-gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32|0x2000002A
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32|0x2000002B
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT32|0x2000002C
+ ##
+ ## The Flash relevant PCD are ineffective and will be patched basing on FDF
definitions during build.
+ ## Set all of them to 0 here to prevent from confusion.
+ ##
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
+
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
+
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
+
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
+
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32|0x2000002A
+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32|0x2000002B
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT32|0x2000002C
[PcdsDynamic, PcdsDynamicEx]
-gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019
+ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
@@ -263,7 +261,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019
[PcdsFixedAtBuild]
- #
+ ## MinPlatform Boot Stage Selector
# Stage 1 - enable debug (system deadloop after debug init)
# Stage 2 - mem init (system deadloop after mem init)
# Stage 3 - boot to shell only
@@ -307,4 +305,3 @@
gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019
gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable
|FALSE|BOOLEAN|0xF00000A5
gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOLEAN|0xF00000A6
gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable
|FALSE|BOOLEAN|0xF00000A7
-
--
2.24.0.windows.2
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