While the alternative PEI-less SEC implementation in PrePi already
takes the EnableVFP PCD into account, the PrePeiCore code does not,
and so we may end up triggering synchronous exception when code
attempts to use FP or SIMD registers, which is permitted by the spec.
So enable the VFP as early as feasible.
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf | 1 +
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf | 1 +
ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 5 +++++
3 files changed, 7 insertions(+)
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
index f2ac45d171bc..104c7da53317 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
@@ -62,6 +62,7 @@ [FeaturePcd]
[FixedPcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
+ gArmTokenSpaceGuid.PcdVFPEnabled
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
index 84c319c3679b..ceb173d34f5d 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
@@ -60,6 +60,7 @@ [FeaturePcd]
[FixedPcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
+ gArmTokenSpaceGuid.PcdVFPEnabled
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index 4911f67577a2..4f691d62cf3b 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -77,6 +77,11 @@ CEntryPoint (
ASSERT (((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0);
ArmWriteVBar ((UINTN)PeiVectorTable);
+ // Enable Floating Point
+ if (FixedPcdGet32 (PcdVFPEnabled)) {
+ ArmEnableVFP ();
+ }
+
//Note: The MMU will be enabled by MemoryPeim. Only the primary core will
have the MMU on.
// If not primary Jump to Secondary Main
--
2.20.1
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