Yes, both the comments shall be fixed. Thanks Ashraf > -----Original Message----- > From: Ni, Ray <ray...@intel.com> > Sent: Wednesday, May 13, 2020 12:09 PM > To: Javeed, Ashraf <ashraf.jav...@intel.com>; devel@edk2.groups.io > Cc: Wang, Jian J <jian.j.w...@intel.com>; Wu, Hao A > <hao.a...@intel.com> > Subject: RE: [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/15] > MdeModulePkg/PciBusDxe: Add the framework to init PCIe features > > > + // " Device MPS MRRS RO NS CTO LTR\n" > 1. Can you update above comments to below? > // "Device MPS MRRS RO NS CTO LTR AtomicOp ExtTag > CCC\n" > It explains why "%03x" or "%08x" is chosen in below DEBUG output. > > > + DEBUG (( > > + DEBUG_INFO, " %02x|%02x|%02x %03x %04x %02x %02x %03x %03x > %08x %06x %03x\n", > > > > +} > > + } > > + //DEBUG ((DEBUG_INFO, " PCIe %s feature...\n", > mPcieFeatureStr[Index])); > 2. Can you please remove the above commented debug message? > > With the two comments addressed, Reviewed-by: Ray Ni > <ray...@intel.com>
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