On 03/15/21 09:04, Jason wrote: > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3265 > > Support collecting cache associative type in CpuCacheInfoLib. > This prevents the user from using additional code to obtain the > same information. > > Signed-off-by: Jason Lou <yun....@intel.com> > Cc: Ray Ni <ray...@intel.com> > Cc: Eric Dong <eric.d...@intel.com> > Cc: Laszlo Ersek <ler...@redhat.com> > Cc: Rahul Kumar <rahul1.ku...@intel.com> > --- > UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 47 > +++++++++++--------- > UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 13 +++++- > UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h | 13 +++++- > 3 files changed, 50 insertions(+), 23 deletions(-)
OVMF doesn't use this library, so I'd like to skip this review. Thanks Laszlo > > diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c > b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c > index d46fb0425851..48ef5dae8ee0 100644 > --- a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c > +++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c > @@ -23,18 +23,18 @@ CpuCacheInfoPrintCpuCacheInfoTable ( > { > UINTN Index; > > - DEBUG ((DEBUG_INFO, > "+-------+-------------------------------------------------------------------------------+\n")); > - DEBUG ((DEBUG_INFO, "| Index | Packge CoreType CacheLevel CacheType > CacheWays CacheSizeinKB CacheCount |\n")); > - DEBUG ((DEBUG_INFO, > "+-------+-------------------------------------------------------------------------------+\n")); > + DEBUG ((DEBUG_INFO, > "+-------+--------------------------------------------------------------------------------------+\n")); > + DEBUG ((DEBUG_INFO, "| Index | Packge CoreType CacheLevel CacheType > CacheWays (FA|DM) CacheSizeinKB CacheCount |\n")); > + DEBUG ((DEBUG_INFO, > "+-------+--------------------------------------------------------------------------------------+\n")); > > for (Index = 0; Index < CpuCacheInfoCount; Index++) { > - DEBUG ((DEBUG_INFO, "| %4x | %4x %2x %2x %2x > %4x %8x %4x |\n", Index, > - CpuCacheInfo[Index].Package, CpuCacheInfo[Index].CoreType, > CpuCacheInfo[Index].CacheLevel, > - CpuCacheInfo[Index].CacheType, CpuCacheInfo[Index].CacheWays, > CpuCacheInfo[Index].CacheSizeinKB, > - CpuCacheInfo[Index].CacheCount)); > + DEBUG ((DEBUG_INFO, "| %4x | %4x %2x %2x %2x > %4x ( %x| %x) %8x %4x |\n", > + Index, CpuCacheInfo[Index].Package, CpuCacheInfo[Index].CoreType, > CpuCacheInfo[Index].CacheLevel, > + CpuCacheInfo[Index].CacheType, CpuCacheInfo[Index].CacheWays, > CpuCacheInfo[Index].FullyAssociativeCache, > + CpuCacheInfo[Index].DirectMappedCache, > CpuCacheInfo[Index].CacheSizeinKB, CpuCacheInfo[Index].CacheCount)); > } > > - DEBUG ((DEBUG_INFO, > "+-------+-------------------------------------------------------------------------------+\n")); > + DEBUG ((DEBUG_INFO, > "+-------+--------------------------------------------------------------------------------------+\n")); > } > > /** > @@ -160,6 +160,7 @@ CpuCacheInfoCollectCoreAndCacheData ( > CPUID_CACHE_PARAMS_EAX CacheParamEax; > CPUID_CACHE_PARAMS_EBX CacheParamEbx; > UINT32 CacheParamEcx; > + CPUID_CACHE_PARAMS_EDX CacheParamEdx; > CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX NativeModelIdAndCoreTypeEax; > COLLECT_CPUID_CACHE_DATA_CONTEXT *Context; > CPUID_CACHE_DATA *CacheData; > @@ -185,17 +186,19 @@ CpuCacheInfoCollectCoreAndCacheData ( > CacheParamLeafIndex = 0; > > while (CacheParamLeafIndex < MAX_NUM_OF_CACHE_PARAMS_LEAF) { > - AsmCpuidEx (CPUID_CACHE_PARAMS, CacheParamLeafIndex, > &CacheParamEax.Uint32, &CacheParamEbx.Uint32, &CacheParamEcx, NULL); > + AsmCpuidEx (CPUID_CACHE_PARAMS, CacheParamLeafIndex, > &CacheParamEax.Uint32, &CacheParamEbx.Uint32, &CacheParamEcx, > &CacheParamEdx.Uint32); > > if (CacheParamEax.Bits.CacheType == 0) { > break; > } > > - CacheData[CacheParamLeafIndex].CacheLevel = > (UINT8)CacheParamEax.Bits.CacheLevel; > - CacheData[CacheParamLeafIndex].CacheType = > (UINT8)CacheParamEax.Bits.CacheType; > - CacheData[CacheParamLeafIndex].CacheWays = > (UINT16)CacheParamEbx.Bits.Ways; > - CacheData[CacheParamLeafIndex].CacheShareBits = > (UINT16)CacheParamEax.Bits.MaximumAddressableIdsForLogicalProcessors; > - CacheData[CacheParamLeafIndex].CacheSizeinKB = (CacheParamEbx.Bits.Ways > + 1) * > + CacheData[CacheParamLeafIndex].CacheLevel = > (UINT8)CacheParamEax.Bits.CacheLevel; > + CacheData[CacheParamLeafIndex].CacheType = > (UINT8)CacheParamEax.Bits.CacheType; > + CacheData[CacheParamLeafIndex].CacheWays = > (UINT16)CacheParamEbx.Bits.Ways; > + CacheData[CacheParamLeafIndex].FullyAssociativeCache = > (UINT8)CacheParamEax.Bits.FullyAssociativeCache; > + CacheData[CacheParamLeafIndex].DirectMappedCache = > (UINT8)CacheParamEdx.Bits.ComplexCacheIndexing; > + CacheData[CacheParamLeafIndex].CacheShareBits = > (UINT16)CacheParamEax.Bits.MaximumAddressableIdsForLogicalProcessors; > + CacheData[CacheParamLeafIndex].CacheSizeinKB = > (CacheParamEbx.Bits.Ways + 1) * > (CacheParamEbx.Bits.LinePartitions + 1) * > (CacheParamEbx.Bits.LineSize + 1) * (CacheParamEcx + 1) / SIZE_1KB; > > CacheParamLeafIndex++; > @@ -305,13 +308,15 @@ CpuCacheInfoCollectCpuCacheInfoData ( > if (CacheInfoIndex == LocalCacheInfoCount) { > ASSERT (LocalCacheInfoCount < MaxCacheInfoCount); > > - LocalCacheInfo[LocalCacheInfoCount].Package = > ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].Package; > - LocalCacheInfo[LocalCacheInfoCount].CoreType = > ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].CoreType; > - LocalCacheInfo[LocalCacheInfoCount].CacheLevel = > CacheData[Index].CacheLevel; > - LocalCacheInfo[LocalCacheInfoCount].CacheType = > CacheData[Index].CacheType; > - LocalCacheInfo[LocalCacheInfoCount].CacheWays = > CacheData[Index].CacheWays; > - LocalCacheInfo[LocalCacheInfoCount].CacheSizeinKB = > CacheData[Index].CacheSizeinKB; > - LocalCacheInfo[LocalCacheInfoCount].CacheCount = 1; > + LocalCacheInfo[LocalCacheInfoCount].Package = > ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].Package; > + LocalCacheInfo[LocalCacheInfoCount].CoreType = > ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].CoreType; > + LocalCacheInfo[LocalCacheInfoCount].CacheLevel = > CacheData[Index].CacheLevel; > + LocalCacheInfo[LocalCacheInfoCount].CacheType = > CacheData[Index].CacheType; > + LocalCacheInfo[LocalCacheInfoCount].CacheWays = > CacheData[Index].CacheWays; > + LocalCacheInfo[LocalCacheInfoCount].FullyAssociativeCache = > CacheData[Index].FullyAssociativeCache; > + LocalCacheInfo[LocalCacheInfoCount].DirectMappedCache = > CacheData[Index].DirectMappedCache; > + LocalCacheInfo[LocalCacheInfoCount].CacheSizeinKB = > CacheData[Index].CacheSizeinKB; > + LocalCacheInfo[LocalCacheInfoCount].CacheCount = 1; > > LocalCacheInfoCount++; > } > diff --git a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h > b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h > index a7f29b188775..f37001a2a2e8 100644 > --- a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h > +++ b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h > @@ -33,7 +33,18 @@ typedef struct { > // Ways of associativity. > // Value = CPUID.04h:EBX[31:22] > // > - UINT16 CacheWays; > + UINT16 CacheWays : 10; > + // > + // Fully associative cache. > + // Value = CPUID.04h:EAX[09] > + // > + UINT16 FullyAssociativeCache : 1; > + // > + // Direct mapped cache. > + // Value = CPUID.04h:EDX[02] > + // > + UINT16 DirectMappedCache : 1; > + UINT16 Reserved : 4; > // > // Size of single cache that this package's this type of logical processor > corresponds to. > // Value = (CPUID.04h:EBX[31:22] + 1) * (CPUID.04h:EBX[21:12] + 1) * > diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h > b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h > index de56db9c0cbe..01fcd36dca1b 100644 > --- a/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h > +++ b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h > @@ -52,7 +52,18 @@ typedef struct { > // Ways of associativity. > // Value = CPUID.04h:EBX[31:22] > // > - UINT16 CacheWays; > + UINT16 CacheWays : 10; > + // > + // Fully associative cache. > + // Value = CPUID.04h:EAX[09] > + // > + UINT16 FullyAssociativeCache : 1; > + // > + // Direct mapped cache. > + // Value = CPUID.04h:EDX[02] > + // > + UINT16 DirectMappedCache : 1; > + UINT16 Reserved : 4; > // > // Cache share bits. > // Value = CPUID.04h:EAX[25:14] > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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