Seemly, Edk2\ArmVirtPkg\Library\QemuFwCfgLib\QemuFwCfgLib.inf is not arch specific library. It can also be used in RISCV64.
Ard and Laszlo: If ArmVirtPkg\Library\QemuFwCfgLib is arch generic, can it be moved from ArmVirtPkg into OvmfPkg? Thanks Liming 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Daniel Schaefer 发送时间: 2021年5月21日 20:46 收件人: devel@edk2.groups.io; gaolim...@byosoft.com.cn 抄送: Chang, Abner (HPS SW/FW Technologist) <abner.ch...@hpe.com>; 'Michael D Kinney' <michael.d.kin...@intel.com>; 'Zhiguang Liu' <zhiguang....@intel.com>; 'Leif Lindholm' <l...@nuviainc.com> 主题: Re: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64 It's not required to go into that tag. We need two more patches that we haven't submitted yet to boot on Qemu. Would it be okay if we used a library from ArmVirtPkg for RISCV64? See: https://github.com/riscv/riscv-edk2/commit/8c7960ef860c65f2646912c3dccbb308a 98e0cc3 Or does it have to be moved to some other place first? _____ From: devel@edk2.groups.io <mailto:devel@edk2.groups.io> <devel@edk2.groups.io <mailto:devel@edk2.groups.io> > on behalf of gaoliming <gaolim...@byosoft.com.cn <mailto:gaolim...@byosoft.com.cn> > Sent: Friday, May 21, 2021 14:35 To: devel@edk2.groups.io <mailto:devel@edk2.groups.io> <devel@edk2.groups.io <mailto:devel@edk2.groups.io> >; Schaefer, Daniel <daniel.schae...@hpe.com <mailto:daniel.schae...@hpe.com> > Cc: Chang, Abner (HPS SW/FW Technologist) <abner.ch...@hpe.com <mailto:abner.ch...@hpe.com> >; 'Michael D Kinney' <michael.d.kin...@intel.com <mailto:michael.d.kin...@intel.com> >; 'Zhiguang Liu' <zhiguang....@intel.com <mailto:zhiguang....@intel.com> >; 'Leif Lindholm' <l...@nuviainc.com <mailto:l...@nuviainc.com> > Subject: 回复: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64 Daniel: Thanks for your information. Acked-by: Liming Gao <gaolim...@byosoft.com.cn <mailto:gaolim...@byosoft.com.cn> > And, do you request to merge this patch for edk2 stable tag 202105? Thanks Liming 发件人: devel@edk2.groups.io <mailto:devel@edk2.groups.io> <devel@edk2.groups.io <mailto:devel@edk2.groups.io> > 代表 Daniel Schaefer 发送时间: 2021年5月21日 13:27 收件人: devel@edk2.groups.io <mailto:devel@edk2.groups.io> ; gaolim...@byosoft.com.cn <mailto:gaolim...@byosoft.com.cn> 抄送: Chang, Abner (HPS SW/FW Technologist) <abner.ch...@hpe.com <mailto:abner.ch...@hpe.com> >; 'Michael D Kinney' <michael.d.kin...@intel.com <mailto:michael.d.kin...@intel.com> >; 'Zhiguang Liu' <zhiguang....@intel.com <mailto:zhiguang....@intel.com> >; 'Leif Lindholm' <l...@nuviainc.com <mailto:l...@nuviainc.com> > 主题: Re: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64 Great! It is verified I can boot Linux from a virtio ESP using this patch on QEMU virt machine. See: https://github.com/riscv/riscv-edk2-platforms/runs/2618819010?check_suite_fo cus=true Thanks, Daniel _____ From: devel@edk2.groups.io <mailto:devel@edk2.groups.io> <devel@edk2.groups.io <mailto:devel@edk2.groups.io> > on behalf of gaoliming <gaolim...@byosoft.com.cn <mailto:gaolim...@byosoft.com.cn> > Sent: Friday, May 21, 2021 13:14 To: devel@edk2.groups.io <mailto:devel@edk2.groups.io> <devel@edk2.groups.io <mailto:devel@edk2.groups.io> >; Schaefer, Daniel <daniel.schae...@hpe.com <mailto:daniel.schae...@hpe.com> > Cc: Chang, Abner (HPS SW/FW Technologist) <abner.ch...@hpe.com <mailto:abner.ch...@hpe.com> >; 'Michael D Kinney' <michael.d.kin...@intel.com <mailto:michael.d.kin...@intel.com> >; 'Zhiguang Liu' <zhiguang....@intel.com <mailto:zhiguang....@intel.com> >; 'Leif Lindholm' <l...@nuviainc.com <mailto:l...@nuviainc.com> > Subject: 回复: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for RiscV64 Daniel: Now, it is clear to me. So, I suggest to merge this change when it is verified on generic RISC-V QEMU virt machine. Is it OK? Thanks Liming > -----邮件原件----- > 发件人: devel@edk2.groups.io <mailto:devel@edk2.groups.io> <devel@edk2.groups.io <mailto:devel@edk2.groups.io> > 代表 Daniel > Schaefer > 发送时间: 2021年5月18日 10:35 > 收件人: devel@edk2.groups.io <mailto:devel@edk2.groups.io> ; gaolim...@byosoft.com.cn <mailto:gaolim...@byosoft.com.cn> > 抄送: 'Abner Chang' <abner.ch...@hpe.com <mailto:abner.ch...@hpe.com> >; 'Michael D Kinney' > <michael.d.kin...@intel.com <mailto:michael.d.kin...@intel.com> >; 'Zhiguang Liu' <zhiguang....@intel.com <mailto:zhiguang....@intel.com> >; 'Leif > Lindholm' <l...@nuviainc.com <mailto:l...@nuviainc.com> > > 主题: Re: 回复: [edk2-devel] [PATCH v1 1/1] Add MemoryFence > implementation for RiscV64 > > On 5/18/21 9:04 AM, gaoliming wrote: > > Daniel: > > Seemly, this API is missing in BaseLib for RiscV64 arch. How do you detect > > this issue? > > What do you mean it's missing? > Yes MemoryFence() for RiscV64 is missing currently, that's why I'm adding it > here. > > Maybe you mean that it's not currently used? That's also true. > I'm enabling the generic QEMU virt machine (like OVMF or ArmVirtPkg) for > RISC-V. > At least QemuFwCfgLib and VirtioLib need it. > That's why I have the need to add this implementation now. > > Does that clear it up? > > > Thanks > > Liming > >> -----邮件原件----- > >> 发件人: devel@edk2.groups.io <mailto:devel@edk2.groups.io> <devel@edk2.groups.io <mailto:devel@edk2.groups.io> > 代表 Daniel > >> Schaefer > >> 发送时间: 2021年5月16日 2:13 > >> 收件人: devel@edk2.groups.io <mailto:devel@edk2.groups.io> > >> 抄送: Abner Chang <abner.ch...@hpe.com <mailto:abner.ch...@hpe.com> >; Michael D Kinney > >> <michael.d.kin...@intel.com <mailto:michael.d.kin...@intel.com> >; Liming Gao <gaolim...@byosoft.com.cn <mailto:gaolim...@byosoft.com.cn> >; > >> Zhiguang Liu <zhiguang....@intel.com <mailto:zhiguang....@intel.com> >; Leif Lindholm <l...@nuviainc.com <mailto:l...@nuviainc.com> > > >> 主题: [edk2-devel] [PATCH v1 1/1] Add MemoryFence implementation for > >> RiscV64 > >> > >> Cc: Abner Chang <abner.ch...@hpe.com <mailto:abner.ch...@hpe.com> > > >> Cc: Michael D Kinney <michael.d.kin...@intel.com <mailto:michael.d.kin...@intel.com> > > >> Cc: Liming Gao <gaolim...@byosoft.com.cn <mailto:gaolim...@byosoft.com. cn> > > >> Cc: Zhiguang Liu <zhiguang....@intel.com <mailto:zhiguang....@intel.com> > > >> Cc: Leif Lindholm <l...@nuviainc.com <mailto:l...@nuviainc.com> > > >> Signed-off-by: Daniel Schaefer <daniel.schae...@hpe.com <mailto:daniel. schae...@hpe.com> > > >> --- > >> MdePkg/Library/BaseLib/BaseLib.inf | 1 + > >> MdePkg/Library/BaseLib/RiscV64/MemoryFence.S | 33 > >> ++++++++++++++++++++ > >> 2 files changed, 34 insertions(+) > >> > >> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf > >> b/MdePkg/Library/BaseLib/BaseLib.inf > >> index b76f3af380ea..b7ab5f632366 100644 > >> --- a/MdePkg/Library/BaseLib/BaseLib.inf > >> +++ b/MdePkg/Library/BaseLib/BaseLib.inf > >> @@ -399,6 +399,7 @@ > >> RiscV64/DisableInterrupts.c > >> > >> > >> RiscV64/EnableInterrupts.c > >> > >> > >> RiscV64/CpuPause.c > >> > >> > >> + RiscV64/MemoryFence.S | GCC > >> > >> > >> RiscV64/RiscVSetJumpLongJump.S | GCC > >> > >> > >> RiscV64/RiscVCpuBreakpoint.S | GCC > >> > >> > >> RiscV64/RiscVCpuPause.S | GCC > >> > >> > >> diff --git a/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S > >> b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S > >> new file mode 100644 > >> index 000000000000..283df9356a9a > >> --- /dev/null > >> +++ b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S > >> @@ -0,0 +1,33 @@ > >> > > +##------------------------------------------------------------------------- > > ----- > >> > >> > >> +# > >> > >> > >> +# MemoryFence() for RiscV64 > >> > >> > >> + > >> > >> > >> +# Copyright (c) 2021, Hewlett Packard Enterprise Development. All rights > >> reserved. > >> > >> > >> +# > >> > >> > >> +# SPDX-License-Identifier: BSD-2-Clause-Patent > >> > >> > >> +# > >> > >> > >> > > +##------------------------------------------------------------------------- > > ----- > >> > >> > >> + > >> > >> > >> +.text > >> > >> > >> +.p2align 2 > >> > >> > >> + > >> > >> > >> +ASM_GLOBAL ASM_PFX(MemoryFence) > >> > >> > >> + > >> > >> > >> + > >> > >> > >> +#/** > >> > >> > >> +# Used to serialize load and store operations. > >> > >> > >> +# > >> > >> > >> +# All loads and stores that proceed calls to this function are > > guaranteed to > >> be > >> > >> > >> +# globally visible when this function returns. > >> > >> > >> +# > >> > >> > >> +#**/ > >> > >> > >> +#VOID > >> > >> > >> +#EFIAPI > >> > >> > >> +#MemoryFence ( > >> > >> > >> +# VOID > >> > >> > >> +# ); > >> > >> > >> +# > >> > >> > >> +ASM_PFX(MemoryFence): > >> > >> > >> + // Fence on all memory and I/O > >> > >> > >> + fence > >> > >> > >> + ret > >> > >> > >> -- > >> 2.30.1 > >> > >> > >> > >> > >> > > > > > > > > > > > > > > > > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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