From: "wenyi.xie" <xiewen...@huawei.com>

The default value of PcdSrIovSystemPageSize is 0x1, it means
the memory BAR is 4KB alignment. When page size of OS is set
to 64KB, as the resource partitions are different between OS
and BIOS, it will cause pcie failture. And if 52 bit physical
address need to be supported, page size should also be set to
64KB alignment.
So modify the default vaule of PcdSrIovSystemPageSize to 0x10
can meet the requirement above. And even if the OS is 4KB
alignment, new value of PCD is compatible for this situation.

Cc: Jian J Wang <jian.j.w...@intel.com>
Cc: Hao A Wu <hao.a...@intel.com>
Signed-off-by: Wenyi Xie <xiewen...@huawei.com>
---
 MdeModulePkg/MdeModulePkg.dec | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index ad84421cf3..426ea1b6cc 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -1853,7 +1853,7 @@
   #  BIT0 set indicates 4KB alignment<BR>
   #  BIT1 set indicates 8KB alignment<BR>
   # @Prompt SRIOV system page size.
-  gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x1|UINT32|0x10000047
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x10|UINT32|0x10000047
 
   ## SMBIOS version.
   # @Prompt SMBIOS version.
-- 
2.20.1.windows.1



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