From: Ashish Kalra <ashish.ka...@amd.com>
Invoke the hypercall API to notify hypervisor when the page's
encryption state changes.
Cc: Jordan Justen <jordan.l.jus...@intel.com>
Cc: Ard Biesheuvel <ard.biesheu...@arm.com>
Signed-off-by: Brijesh Singh <brijesh.si...@amd.com>
Signed-off-by: Ashish Kalra <ashish.ka...@amd.com>
---
.../X64/PeiDxeVirtualMemory.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
index b9c0a5b25a..b8478dd948 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c
@@ -701,6 +701,7 @@ SetMemoryEncDec (
UINT64 PgTableMask;
UINT64 AddressEncMask;
BOOLEAN IsWpEnabled;
+ BOOLEAN CBitChanged;
UINTN OrigLength;
RETURN_STATUS Status;
@@ -769,6 +770,7 @@ SetMemoryEncDec (
// Save the specified length and physical address (we need it later).
//
OrigLength = Length;
+ CBitChanged = FALSE;
OrigPhysicalAddress = PhysicalAddress;
while (Length != 0) {
@@ -829,6 +831,7 @@ SetMemoryEncDec (
));
PhysicalAddress += BIT30;
Length -= BIT30;
+ CBitChanged = TRUE;
} else {
//
// We must split the page
@@ -884,6 +887,7 @@ SetMemoryEncDec (
SetOrClearCBit (&PageDirectory2MEntry->Uint64, Mode);
PhysicalAddress += BIT21;
Length -= BIT21;
+ CBitChanged = TRUE;
} else {
//
// We must split up this page into 4K pages
@@ -927,6 +931,7 @@ SetMemoryEncDec (
SetOrClearCBit (&PageTableEntry->Uint64, Mode);
PhysicalAddress += EFI_PAGE_SIZE;
Length -= EFI_PAGE_SIZE;
+ CBitChanged = TRUE;
}
}
}
@@ -959,6 +964,17 @@ SetMemoryEncDec (
);
}
+ //
+ // Notify Hypervisor on C-bit status
+ //
+ if (CBitChanged) {
+ Status = SetMemoryEncDecHypercall3 (
+ OrigPhysicalAddress,
+ EFI_SIZE_TO_PAGES (OrigLength),
+ (Mode == SetCBit) ? TRUE : FALSE
+ );
+ }
+
Done:
//
// Restore page table write protection, if any.
--
2.25.1
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