From: Pierre Gondois <pierre.gond...@arm.com>
>From ACPI 5.1, s19.5.28 DefinitionBlock (Declare Definition Block):
Note: For compatibility with ACPI versions before
ACPI 2.0, the bit width of Integer objects is
dependent on the ComplianceRevision of the DSDT.
If the ComplianceRevision is less than 2, all
integers are restricted to 32 bits. Otherwise,
full 64-bit integers are used. The version of the DSDT
sets the global integer width for all integers,
including integers in SSDTs.
To be up-to-date with the latest table revision, bump the version
of all dsdt/ssdt tables that are relying on an ACPI specification
version above 2.0.
Signed-off-by: Pierre Gondois <pierre.gond...@arm.com>
---
Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl | 2 +-
Platform/ARM/JunoPkg/AcpiTables/Dsdt.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/Dsdt.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/SsdtJunoUsb.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/DsdtFvp.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/SsdtPciFvp.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/Dsdt.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/SsdtPci.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl | 2 +-
.../ConfigurationManagerDxe/AslTables/Dsdt.asl | 2 +-
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl
b/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl
index e60fc42a3340..9ffc045bfc8a 100644
--- a/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl
+++ b/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl
@@ -57,7 +57,7 @@
// Device 0 for Bridge.
-DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
+DefinitionBlock("SsdtPci.aml", "SSDT", 2, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
Scope(_SB) {
//
// PCI Root Complex
diff --git a/Platform/ARM/JunoPkg/AcpiTables/Dsdt.asl
b/Platform/ARM/JunoPkg/AcpiTables/Dsdt.asl
index 61353213fe6f..0e6b2db4ff5a 100644
--- a/Platform/ARM/JunoPkg/AcpiTables/Dsdt.asl
+++ b/Platform/ARM/JunoPkg/AcpiTables/Dsdt.asl
@@ -8,7 +8,7 @@
#include "ArmPlatform.h"
-DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
+DefinitionBlock("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
Scope(_SB) {
//
// A57x2-A53x4 Processor declaration
diff --git
a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
index 2270b517cd12..f16e80b9bc0b 100644
---
a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
+++
b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
@@ -8,7 +8,7 @@
#include "ArmPlatform.h"
-DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
+DefinitionBlock("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
Scope(_SB) {
//
// A57x2-A53x4 Processor declaration
diff --git
a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtJunoUsb.asl
b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtJunoUsb.asl
index 8ff9d150b92a..4aaaedde830b 100644
---
a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtJunoUsb.asl
+++
b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtJunoUsb.asl
@@ -8,7 +8,7 @@
#include "ArmPlatform.h"
-DefinitionBlock("SsdtJunoUSB.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
+DefinitionBlock("SsdtJunoUSB.aml", "SSDT", 2, "ARMLTD", "ARM-JUNO",
EFI_ACPI_ARM_OEM_REVISION) {
Scope(_SB) {
//
// USB EHCI Host Controller
diff --git
a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/DsdtFvp.asl
b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/DsdtFvp.asl
index 6ff3d030ba9f..e63c2d197301 100644
---
a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/DsdtFvp.asl
+++
b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/DsdtFvp.asl
@@ -8,7 +8,7 @@
#include "ConfigurationManager.h"
-DefinitionBlock("Dsdt.aml", "DSDT", 1, "ARMLTD", "MORELLO",
CFG_MGR_OEM_REVISION) {
+DefinitionBlock("Dsdt.aml", "DSDT", 2, "ARMLTD", "MORELLO",
CFG_MGR_OEM_REVISION) {
Scope(_SB) {
Device(CP00) { // Cluster 0, Cpu 0
Name(_HID, "ACPI0007")
diff --git
a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPciFvp.asl
b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPciFvp.asl
index bdf2f06aed69..2a73c2c9385f 100644
---
a/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPciFvp.asl
+++
b/Platform/ARM/Morello/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPciFvp.asl
@@ -30,7 +30,7 @@
#define ROOT_PRT_ENTRY(Pin, Link) PRT_ENTRY(0x0000FFFF, Pin, Link) //
Device 0 for Bridge.
-DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "MORELLO",
+DefinitionBlock("SsdtPci.aml", "SSDT", 2, "ARMLTD", "MORELLO",
CFG_MGR_OEM_REVISION)
{
Scope (_SB) {
diff --git
a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
index 818862cd7589..6263ff082a05 100644
---
a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
+++
b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
@@ -59,7 +59,7 @@
#define CS_OUTPUT_PORT(_port, _rport, _rphandle) \
CS_PORT(_port, _rport, _rphandle, CS_LINK_MASTER)
-DefinitionBlock("Dsdt.aml", "DSDT", 1, "ARMLTD", "N1Sdp",
EFI_ACPI_ARM_OEM_REVISION) {
+DefinitionBlock("Dsdt.aml", "DSDT", 2, "ARMLTD", "N1Sdp",
EFI_ACPI_ARM_OEM_REVISION) {
Scope(_SB) {
Device(CP00) { // Ares-0: Cluster 0, Cpu 0
Name(_HID, "ACPI0007")
diff --git
a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl
b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl
index 9922673d0d8d..194992b8bb55 100644
---
a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl
+++
b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl
@@ -61,7 +61,7 @@
*/
#define ROOT_PRT_ENTRY(Pin, Link) PRT_ENTRY(0x0000FFFF, Pin, Link) //
Device 0 for Bridge.
-DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "N1Sdp",
+DefinitionBlock("SsdtPci.aml", "SSDT", 2, "ARMLTD", "N1Sdp",
EFI_ACPI_ARM_OEM_REVISION)
{
Scope (_SB) {
diff --git
a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl
b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl
index 4c6e0c762fe0..25489b7ed93d 100644
---
a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl
+++
b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl
@@ -61,7 +61,7 @@
*/
#define ROOT_PRT_ENTRY(Pin, Link) PRT_ENTRY(0x0000FFFF, Pin, Link) //
Device 0 for Bridge.
-DefinitionBlock("SsdtRemotePci.aml", "SSDT", 1, "ARMLTD", "N1Sdp",
+DefinitionBlock("SsdtRemotePci.aml", "SSDT", 2, "ARMLTD", "N1Sdp",
EFI_ACPI_ARM_OEM_REVISION)
{
Scope (_SB) {
diff --git
a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
index e04003d562dd..3acc0c6bc1b4 100644
---
a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
+++
b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/AslTables/Dsdt.asl
@@ -9,7 +9,7 @@
**/
-DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-VEXP", 1) {
+DefinitionBlock("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARM-VEXP", 1) {
Scope(_SB) {
//
// Processor
--
2.25.1
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