There is no need for a separate ID for CCIX host bridge,
therefore reusing PCIe PNP ID for CCIX.
Also, updating the file's license to resolve error during
ECC checks.
Signed-off-by: sahil <sa...@arm.com>
---
Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c | 17
+++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git
a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
index 1f38f654a8ce..4c1acf154ca0 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -1,10 +1,11 @@
/** @file
-* PCI Host Bridge Library instance for ARM Neoverse N1 platform
-*
-* Copyright (c) 2019 - 2022, ARM Limited. All rights reserved.<BR>
-*
-* SPDX-License-Identifier: BSD-2-Clause-Patent
-*
+
+ PCI Host Bridge Library instance for ARM Neoverse N1 platform
+
+ Copyright (c) 2019 - 2022, ARM Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
**/
#include <PiDxe.h>
@@ -65,8 +66,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH
mEfiPciRootBridgeDevicePath[ROOT_COMPLEX_
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
}
},
- EISA_PNP_ID(0x0A09), // CCIX
- 0
+ EISA_PNP_ID(0x0A08), // CCIX
+ 1
},
{
END_DEVICE_PATH_TYPE,
--
2.25.1
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