On Wed, May 10, 2023 at 01:56:59AM +0000, Wu, Jiaxin wrote: > This happens to transfer PEI control to DXE. The paging is created for DXE > phase,
Ah, ok. The code looks fine then. > so, here, it's means the cpu running in the ia32 pei. I will refine the > comments as below: > > If cpu has already runned in X64 PEI, Page table Level in DXE must align with > previous level. > If cpu runs in IA32 PEI, Page table Level in DXE is decided by PCD and > feature capbility. Good idea. thanks, Gerd -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#104506): https://edk2.groups.io/g/devel/message/104506 Mute This Topic: https://groups.io/mt/98780503/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
