Hi Ray,
I don't think we need the 16 bytes align for reset vector.
Because the size of reset vector is 16 bytes align, and it will be put in the
end of FD, this mean the beginning address of the reset vector is (4G - size of
reset vector), which is 16 bytes align.
Thanks
Zhiguang
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
> Sent: Thursday, June 15, 2023 6:51 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.d...@intel.com>; Kumar, Rahul R
> <rahul.r.ku...@intel.com>; Gerd Hoffmann <kra...@redhat.com>
> Subject: [edk2-devel] [PATCH 2/3] UefiCpuPkg/ResetVector: Add guidance
> of how to guarantee 16B align
>
> ResetVector assembly implementation puts "ALIGN 16" in the end
> to guarantee the final executable file size is multiple of 16 bytes.
> Because the module uses a special GUID which guarantees it's put in
> the very end of a FV, which should be also the end of the FD.
> Then to make sure the reset vector "JMP" code is at FFFF_FFF0h, the
> ResetVector has to be aligned at 16-byte boundary.
>
> The patch updates INF file and ReadMe.txt to add guidance how to make
> sure the module is aligned on 16-byte boundary.
>
> Signed-off-by: Ray Ni <ray...@intel.com>
> Cc: Eric Dong <eric.d...@intel.com>
> Cc: Rahul Kumar <rahul1.ku...@intel.com>
> Cc: Gerd Hoffmann <kra...@redhat.com>
> ---
> UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 27 +++++++-------------------
> UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf | 19 +++++++++++++++++-
> 2 files changed, 25 insertions(+), 21 deletions(-)
>
> diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> index 97f4600968..edeb2d6d3e 100644
> --- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> +++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
> @@ -1,15 +1,16 @@
>
>
> === HOW TO USE VTF0 ===
>
> +Add this line to your DSC [Components.IA32] or [Components.X64] section:
>
> + UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
>
>
>
> Add this line to your FDF FV section:
>
> -INF RuleOverride=RESET_VECTOR USE = IA32
> UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
>
> -(For X64 SEC/PEI change IA32 to X64 => 'USE = X64')
>
> + INF RuleOverride=RESET_VECTOR
> UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
>
>
>
> In your FDF FFS file rules sections add:
>
> -[Rule.Common.SEC.RESET_VECTOR]
>
> - FILE RAW = $(NAMED_GUID) {
>
> - RAW RAW |.raw
>
> - }
>
> + [Rule.Common.SEC.RESET_VECTOR]
>
> + FILE RAW = $(NAMED_GUID) {
>
> + RAW BIN Align = 16 |.bin
>
> + }
>
>
>
> === VTF0 Boot Flow ===
>
>
>
> @@ -25,17 +26,3 @@ All inputs to SEC image are register based:
> EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)
>
> DI - 'BP': boot-strap processor, or 'AP': application processor
>
> EBP/RBP - Pointer to the start of the Boot Firmware Volume
>
> -
>
> -=== HOW TO BUILD VTF0 ===
>
> -
>
> -Dependencies:
>
> -* Python 3 or newer
>
> -* Nasm 2.03 or newer
>
> -
>
> -To rebuild the VTF0 binaries:
>
> -1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0
>
> -2. nasm and python should be in executable path
>
> -3. Run this command:
>
> - python Build.py
>
> -4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin
>
> -
>
> diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> index 9922cb2755..28185a6e60 100644
> --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
> @@ -1,7 +1,24 @@
> ## @file
>
> # Reset Vector
>
> #
>
> -# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
>
> +# Note:
>
> +# The platform FDF file MUST guarantee the ResetVector is aligned
>
> +# on 16-byte boundary. Otherwise, the CPU reset vector will NOT be
>
> +# at FFFF_FFF0h.
>
> +#
>
> +# A sample FDF build rule could be as follows:
>
> +#
>
> +# [Rule.Common.SEC.RESET_VECTOR]
>
> +# FILE RAW = $(NAMED_GUID) {
>
> +# RAW BIN Align = 16 |.bin
>
> +# }
>
> +#
>
> +# Following line in FDF forces to use the above build rule for the
> ResetVector:
>
> +#
>
> +# INF RuleOverride=RESET_VECTOR
> UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
>
> +#
>
> +#
>
> +# Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.<BR>
>
> #
>
> # SPDX-License-Identifier: BSD-2-Clause-Patent
>
> #
>
> --
> 2.39.1.windows.1
>
>
>
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
> View/Reply Online (#106112):
> https://edk2.groups.io/g/devel/message/106112
> Mute This Topic: https://groups.io/mt/99546049/1779286
> Group Owner: devel+ow...@edk2.groups.io
> Unsubscribe:
> https://edk2.groups.io/g/devel/leave/3883862/1779286/1021340322/xyzzy
> [zhiguang....@intel.com]
> -=-=-=-=-=-=
>
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#106164): https://edk2.groups.io/g/devel/message/106164
Mute This Topic: https://groups.io/mt/99546049/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-
