Abner:
PI 1.8 Errata has not been published. This change may be deferred until
new spec is public.
Thanks
Liming
> -----邮件原件-----
> 发件人: abner.ch...@amd.com <abner.ch...@amd.com>
> 发送时间: 2023年8月1日 15:57
> 收件人: devel@edk2.groups.io
> 抄送: Michael D Kinney <michael.d.kin...@intel.com>; Liming Gao
> <gaolim...@byosoft.com.cn>; Zhiguang Liu <zhiguang....@intel.com>; Abdul
> Lateef Attar <abdat...@amd.com>
> 主题: [PATCH V2 1/6] MdePkg/Include: Update definitions of SPI related
> header files
>
> From: Abner Chang <abner.ch...@amd.com>
>
> BZ#: 4471
> Update definitions according to PI spec v1.8 Errata as it
> is approved in PIWG (Ticket #2394).
>
> Signed-off-by: Abner Chang <abner.ch...@amd.com>
> Cc: Michael D Kinney <michael.d.kin...@intel.com>
> Cc: Liming Gao <gaolim...@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang....@intel.com>
> Cc: Abdul Lateef Attar <abdat...@amd.com>
> ---
> MdePkg/Include/Protocol/SpiConfiguration.h | 8 ++++++++
> MdePkg/Include/Protocol/SpiHc.h | 14 ++++++++++++++
> MdePkg/Include/Protocol/SpiIo.h | 10 ++++++++++
> 3 files changed, 32 insertions(+)
>
> diff --git a/MdePkg/Include/Protocol/SpiConfiguration.h
> b/MdePkg/Include/Protocol/SpiConfiguration.h
> index 3f8fb9ff62c..cffdc8e232d 100644
> --- a/MdePkg/Include/Protocol/SpiConfiguration.h
> +++ b/MdePkg/Include/Protocol/SpiConfiguration.h
> @@ -2,6 +2,7 @@
> This file defines the SPI Configuration Protocol.
>
> Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Revision Reference:
> @@ -168,6 +169,13 @@ typedef struct _EFI_SPI_BUS {
> VOID *ClockParameter;
> } EFI_SPI_BUS;
>
> +///
> +/// Definitions of SPI Part Attributes.
> +///
> +#define SPI_PART_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0
> +#define SPl_PART_SUPPORTS_4_B1T_DATA_BUS_WIDTH BIT1
> +#define SPl_PART_SUPPORTS_8_B1T_DATA_BUS_WIDTH BIT2
> +
> ///
> /// The EFI_SPI_PERIPHERAL data structure describes how a specific block
of
> /// logic which is connected to the SPI bus. This data structure also
selects
> diff --git a/MdePkg/Include/Protocol/SpiHc.h
> b/MdePkg/Include/Protocol/SpiHc.h
> index 30128dd5c4d..645bfdefe9b 100644
> --- a/MdePkg/Include/Protocol/SpiHc.h
> +++ b/MdePkg/Include/Protocol/SpiHc.h
> @@ -2,6 +2,7 @@
> This file defines the SPI Host Controller Protocol.
>
> Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Revision Reference:
> @@ -121,6 +122,19 @@ typedef EFI_STATUS
> IN EFI_SPI_BUS_TRANSACTION *BusTransaction
> );
>
> +///
> +/// Definitions of SPI Host Controller Attributes.
> +///
> +#define HC_SUPPORTS_WRITE_ONLY_OPERATIONS BIT0
> +#define HC_SUPPORTS_READ_ONLY_OPERATIONS BIT1
> +#define HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS BIT2
> +#define HC_TX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT3
> +#define HC_RX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT4
> +#define HC_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT5
> +#define HC_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT6
> +#define HC_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT7
> +#define HC_TRANSFER_SIZE_INCLUDES_OPCODE BIT8
> +#define HC_TRANSFER_SIZE_INCLUDES_ADDRESS BIT9
> ///
> /// Support a SPI data transaction between the SPI controller and a SPI
chip.
> ///
> diff --git a/MdePkg/Include/Protocol/SpiIo.h
> b/MdePkg/Include/Protocol/SpiIo.h
> index b4fc5e03b88..0ea881fd115 100644
> --- a/MdePkg/Include/Protocol/SpiIo.h
> +++ b/MdePkg/Include/Protocol/SpiIo.h
> @@ -2,6 +2,7 @@
> This file defines the SPI I/O Protocol.
>
> Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Revision Reference:
> @@ -223,6 +224,15 @@ typedef struct _EFI_SPI_BUS_TRANSACTION {
> UINT8 *ReadBuffer;
> } EFI_SPI_BUS_TRANSACTION;
>
> +///
> +/// Definitions of SPI I/O Attributes.
> +///
> +#define SPI_IO_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0
> +#define SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT1
> +#define SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT2
> +#define SPI_IO_TRANSFER_SIZE_INCLUDES_OPCODE BIT3
> +#define SPI_IO_TRANSFER_SIZE_INCLUDES_ADDRESS BIT4
> +
> ///
> /// Support managed SPI data transactions between the SPI controller and
a
> SPI
> /// chip.
> --
> 2.37.1.windows.1
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