From: caiyuqing379 <[email protected]>
Description:
Deploy EDK2 to run on 64-core CPU under RISC-V architecture, and successfully
boot to OS.
Implementation can be seen at:
https://github.com/AII-SDU/edk2-platforms/tree/devel-Sophgo/SG2042Pkg/Platform/Sophgo.
Current status:
1) Adopted the scheme of separating OpenSBI and EDK2. It follows PEI less
design.
2) The boot flow is: ZSBL + FSBL + OpenSBI + EDK2 + GRUB2 + Linux OS.
ZSBL initializes DDR and loads OpenSBI and EDK2 into memory from the SD
card.
Boot Linux from SD Card, NVMe SSD.
3) Clang toolchain support
Build the port using the CLANGDWARF toolchain and the built binary can
boot Linux OS.
4) Milk-V Pioneer board support
The latest firmware type of opensbi provided by Sophgo is replaced from
fw_jump.bin
to fw_dynamic.bin. Currently, Sophgo/SG2042_EVB_Board has been tested and
proven
to be compatible with Milk-V Pioneer board.
Work in progress:
1) Add PCIe driver support
Sophgo's engineer have added PCIe drivers, NVMe SSD over PCIe has been
tested on EVB
and Milk-V with no problems, and other PCIe devices are doing workaround.
The PCIe
driver should be upstreamed by Sophgo after completion of this patch
series submission.
4) Enable MMU
Currently, set PcdCpuRiscVMmuMaxSatpMode to bare mode to avoid memory map
issues.
Revision History:
Patch v5:
This patch series provides the changes:
1) Dropped PlatformUpdateMmuDxe patch.
We tested Tuan's patch and currently set PcdCpuRiscVMmuMaxSatpMode to
bare mode.
2) Currently add memory nodes to zsbl's code, which makes the memory node's
in the
dt reverse-ordered by address. So add only lowest memory node in SEC
module.
Patch v4:
The patch series can be seen at:
https://edk2.groups.io/g/devel/message/108756
(Between message 108756 and message 108764, total of nine patches)
The patch series provides the changes:
1) The patch 3&4 fix INF_VERSION to 1.27.
2) Some of the code in patch 3&4 is based on the open source code provided
by Sophgo,
which is licensed under BDS-3. The patch 3&4 change license from BDS-3
to BDS-2 by
confirming with Sophgo.
3) Add comments to the patch 5 indicates that OpenSBI 1.3/1.3.1 should be
used, which
fixed the no-mapping issue. The current OpenSBI provided by Sophgo is
v1.2, and the
dt provided by Sophgo does not use no-map, v1.3 is being actively
upgraded.
4) This version already supports Clang toolchain, which can be seen at
README.md.
Patch v3:
The patch series can be seen at:
https://edk2.groups.io/g/devel/message/108376
(Between message 108376 and message 108384, total of nine patches)
The patch series provides the changes:
1) Remove firmware context
Reference to Andrei's branch, in the SEC module, the patch 5 avoids
getting the FDT
pointer from the firmware.
2) Blurb
The patch 0 adds some descriptions in Blurb to explain the current
status, testing
situation, and limitations of the project.
3) Milk-V Pioneer board
Running EDK2 on the Milk-V Pioneer board boots into UEFI shell normally,
but the SD
driver can't recognize all the partitions correctly and can't boot Linux
OS.
4) Layout
Based on Leif's comment, we moved most of the code in the port from
Platform/Sophgo/SG2042Pkg/
to
Silicon/Sophgo/SG2042Pkg/
5) Clang toolchain support
Our team tried to build the port using the CLANGDWARF toolchain (clang
version 18.0.0),
and updated README.md for CLANGDWARF support. It's able to build
successfully but the
built binary is not fully work.
Patch v2:
The patch series can be seen at:
https://edk2.groups.io/g/devel/message/108216
(Between message 108210 and message 108218, total of nine patches)
The patch series provides the following changes:
1) To avoid further duplication, the patch 2 adds a PlatformUpdateMmuDxe
which contains two
main features. The first feature is to change the page attributes
corresponding to memory.
The second feature is to introduce a PCD variable PcdForceNoMMU to
disable MMU. Currently,
enabling MMU results in a timeout for reading data blocks from the SD
card, so MMU is
disabled by default.
2) No change in patch 5's memory initialization method. It's not guaranteed
that you won't
hit grub relocation overflow error with this method, but using this
method at least masks
the problem for the time being.
Patch v1:
The patch series can be seen at:
https://edk2.groups.io/g/devel/message/107885
(Between message 107885 and message 107893, total of nine patches)
The patch series provides the features:
1) The patch 1 use standard SMBIOS modules.
2) The patch 2 copy RISC-V MMU Library.
SG2042 (Xuantie C920) MMU can be enabled in SV39 mode, but there are
bugs with exception
handling and MMC that need to be fixed, so MMU is disabled. Add this
library is to ensure
build successfully. So the RiscVConfigureMmu function was modified in
patch 2 to set the
satp mode to SATP_MODE_OFF.
3) The SEC module in patch 5 has made a few changes compared to RiscVVirt.
The memory space size of SG2042 EVB is determined by the number and size
of DDRs inserted
on the board. All memory in RiscVVirt is added in the SEC moudle, using
InitializeRamRegions
to initialize the system memory space for each memory node separately,
but the actual
MemoryLength is only the size of the first memory node. Therefore,
InitializeRamRegions
is called only once to initialize the total system memory.
4) Use opensbi v1.2 instead of the latest v1.3.
The opensbi for SG2042 is maintained by Sophgo and there are issues with
using opensbi v1.3.
Currently, v1.3 is being actively upgraded.
caiyuqing379 (7):
Sophgo/SG2042Pkg: Add SmbiosPlatformDxe module.
Sophgo/SG2042Pkg: Add Sophgo SDHCI driver.
Sophgo/SG2042Pkg: Add base MMC driver.
Sophgo/SG2042Pkg: Add SEC module.
Sophgo/SG2042_EVB_Board: Add Sophgo SG2042 platform.
Sophgo/SG2042Pkg: Add SG2042Pkg.
Sophgo/SG2042Pkg: Add platform readme and document.
Platform/Sophgo/SG2042_EVB_Board/SG2042.dec | 19 +
Silicon/Sophgo/SG2042Pkg/SG2042Pkg.dec | 34 +
Platform/Sophgo/SG2042_EVB_Board/SG2042.dsc | 557 +++++++++++
Platform/Sophgo/SG2042_EVB_Board/SG2042.fdf | 248 +++++
.../SG2042Pkg/Drivers/MmcDxe/MmcDxe.inf | 46 +
.../SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.inf | 48 +
.../SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 39 +
Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf | 68 ++
Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.h | 513 ++++++++++
.../SG2042Pkg/Drivers/SdHostDxe/SdHci.h | 309 ++++++
Silicon/Sophgo/SG2042Pkg/Include/MmcHost.h | 225 +++++
Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h | 104 ++
.../SG2042Pkg/Drivers/MmcDxe/ComponentName.c | 156 +++
.../SG2042Pkg/Drivers/MmcDxe/Diagnostics.c | 323 ++++++
Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.c | 527 ++++++++++
.../SG2042Pkg/Drivers/MmcDxe/MmcBlockIo.c | 646 ++++++++++++
.../SG2042Pkg/Drivers/MmcDxe/MmcDebug.c | 194 ++++
.../Drivers/MmcDxe/MmcIdentification.c | 719 ++++++++++++++
.../SG2042Pkg/Drivers/SdHostDxe/SdHci.c | 929 ++++++++++++++++++
.../SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.c | 449 +++++++++
.../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 805 +++++++++++++++
Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c | 29 +
Silicon/Sophgo/SG2042Pkg/Sec/Memory.c | 327 ++++++
Silicon/Sophgo/SG2042Pkg/Sec/Platform.c | 130 +++
Silicon/Sophgo/SG2042Pkg/Sec/SecMain.c | 115 +++
Platform/Sophgo/About_Sophgo_platform.md | 55 ++
.../Documents/Media/EDK2_SDU_Programme.png | Bin 0 -> 59830 bytes
.../Sophgo/Documents/Media/SG2042_CPU.png | Bin 0 -> 806062 bytes
.../Documents/Media/Sophgo_SG2042_EVB.png | Bin 0 -> 1445528 bytes
Platform/Sophgo/Maintainers.md | 105 ++
Platform/Sophgo/SG2042_EVB_Board/Readme.md | 103 ++
.../Sophgo/SG2042_EVB_Board/SG2042.fdf.inc | 61 ++
.../Sophgo/SG2042_EVB_Board/VarStore.fdf.inc | 77 ++
Silicon/Sophgo/SG2042Pkg/SG2042Pkg.uni | 13 +
Silicon/Sophgo/SG2042Pkg/SG2042PkgExtra.uni | 12 +
Silicon/Sophgo/SG2042Pkg/Sec/SecEntry.S | 18 +
36 files changed, 8003 insertions(+)
create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.dec
create mode 100644 Silicon/Sophgo/SG2042Pkg/SG2042Pkg.dec
create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.dsc
create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.fdf
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcDxe.inf
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.inf
create mode 100644
Silicon/Sophgo/SG2042Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.inf
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.h
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHci.h
create mode 100644 Silicon/Sophgo/SG2042Pkg/Include/MmcHost.h
create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.h
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/ComponentName.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Diagnostics.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/Mmc.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcBlockIo.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcDebug.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/MmcDxe/MmcIdentification.c
create mode 100755 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHci.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Drivers/SdHostDxe/SdHostDxe.c
create mode 100644
Silicon/Sophgo/SG2042Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Cpu.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Memory.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/Platform.c
create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecMain.c
create mode 100644 Platform/Sophgo/About_Sophgo_platform.md
create mode 100644 Platform/Sophgo/Documents/Media/EDK2_SDU_Programme.png
create mode 100644 Platform/Sophgo/Documents/Media/SG2042_CPU.png
create mode 100644 Platform/Sophgo/Documents/Media/Sophgo_SG2042_EVB.png
create mode 100644 Platform/Sophgo/Maintainers.md
create mode 100644 Platform/Sophgo/SG2042_EVB_Board/Readme.md
create mode 100644 Platform/Sophgo/SG2042_EVB_Board/SG2042.fdf.inc
create mode 100644 Platform/Sophgo/SG2042_EVB_Board/VarStore.fdf.inc
create mode 100644 Silicon/Sophgo/SG2042Pkg/SG2042Pkg.uni
create mode 100644 Silicon/Sophgo/SG2042Pkg/SG2042PkgExtra.uni
create mode 100644 Silicon/Sophgo/SG2042Pkg/Sec/SecEntry.S
--
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