Thanks for the discussion, Are we saying that DataSynchronizationBarrier () before the return from RootBridgeIoPciAccess() is not strong enough to determine that the final ECAM write would have completed? According to Learn the architecture - ARMv8-A memory systems ( https://developer.arm.com/documentation/100941/0101/Barriers ) the DSB should block "execution of any further instructions, not just loads or stores, until synchronization is complete". To me this means that for Arm the DSB will stall any subsequent instructions until the completion for the ECAM write is received by the processor.
Though if an architecture-agnostic solution is desired the readback before returning from RootBridgeIoPciAccess() does make sense. If the access spanned multiple DWORDs then should a read from the final aligned DWORD in the "buffer" be sufficient? -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110489): https://edk2.groups.io/g/devel/message/110489 Mute This Topic: https://groups.io/mt/102310377/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
