Hi Jose,
1. This logic needs to move into an AARCH64 specific directory/file. Other architectures handle this in other ways. 2. There are many places throughout edk2 sources that perform PCI config write operations. You are only fixing it in a single location. You may want to look at the MdePkg PciLibs to see if it can be addressed there with an AARCH64 specific dir/file, but that still may not address all possible PCI config write accesses. Fill analysis of the target platform sources may be required to make sure it is fixes for all locations. Mike From: Jose Lopez <jlo...@gmail.com> Sent: Tuesday, November 7, 2023 10:59 AM To: devel@edk2.groups.io Cc: Leif Lindholm <quic_llind...@quicinc.com>; Ard Biesheuvel <ardb+tianoc...@kernel.org>; Gao, Liming <gaolim...@byosoft.com.cn>; Michael Brown <mc...@ipxe.org>; Pedro Falcato <pedro.falc...@gmail.com>; Ni, Ray <ray...@intel.com>; Wu, Hao A <hao.a...@intel.com>; Wang, Jian J <jian.j.w...@intel.com>; Sami Mujawar <sami.muja...@arm.com>; ler...@redhat.com; Kinney, Michael D <michael.d.kin...@intel.com> Subject: Re: [PATCH v2] MdeModulePkg/PciHostBridgeDxe: Add readback after final Cfg-Write ++ Laszlo and Michael On Tue, Nov 7, 2023 at 10:54 AM Jose Lopez <jlo...@gmail.com<mailto:jlo...@gmail.com>> wrote: ++ CC'd On Mon, Nov 6, 2023 at 6:02 PM Joe Lopez <jlo...@gmail.com<mailto:jlo...@gmail.com>> wrote: From: joelopez333 <jlo...@gmail.com<mailto:jlo...@gmail.com>> REF:https://edk2.groups.io/g/devel/topic/102310377#110456 Problem Report: On AARCH64, there is no ordering guarantee between configuration space (ECAM) writes and memory space reads (MMIO). ARM AMBA CHI only guarantees ordering for reads and writes within a single address region, however, on some systems MMIO and ECAM may be split into separate address regions. A problem may arise when an ECAM write is issued a completion before a subsequent MMIO read is issued and receives a completion. For example, a typical PCI software flow is the following: 1. ECAM write to device command register to enable memory space 2. MMIO read from device memory space for which access was enabled in step 1. There is no guarantee that step 2. will not begin before the completion of step 1. on systems where ECAM/MMIO are specified as separate address regions, even if both spaces have the memory attributes device-nGnRnE. Fix: - Add a read after the final PCI Configuration space write in RootBridgeIoPciAccess. - When configuration space is strongly ordered, this ensures that program execution cannot continue until the completion is received for the previous Cfg-Write, which may have side-effects. - Risk of reading a "write-only" register and causing a CA which leaves the device unresponsive. The expectation based on the PCI Base Spec v6.1 section 7.4 is that all PCI Spec-defined registers will be readable, however, there may exist design-specific registers that fall into this category. Cc: Leif Lindholm <quic_llind...@quicinc.com<mailto:quic_llind...@quicinc.com>> Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org<mailto:ardb%2btianoc...@kernel.org>> Cc: Sami Mujawar <sami.muja...@arm.com<mailto:sami.muja...@arm.com>> Cc: Jian J Wang <jian.j.w...@intel.com<mailto:jian.j.w...@intel.com>> Cc: Liming Gao <gaolim...@byosoft.com.cn<mailto:gaolim...@byosoft.com.cn>> Cc: Hao A Wu <hao.a...@intel.com<mailto:hao.a...@intel.com>> Cc: Ray Ni <ray...@intel.com<mailto:ray...@intel.com>> Cc: Pedro Falcato <pedro.falc...@gmail.com<mailto:pedro.falc...@gmail.com>> Cc: Michael Brown <mc...@ipxe.org<mailto:mc...@ipxe.org>> Signed-off-by: Joe Lopez <jlot...@gmail.com<mailto:jlot...@gmail.com>> --- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c index 157a0ada80..c2dc2018d6 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c @@ -1238,6 +1238,14 @@ RootBridgeIoPciAccess ( } } + // + // Perform readback after write to confirm completion was received for the last write + // before subsequent memory operations can be issued. + // + if (!Read) { + PciSegmentRead8 (Address - InStride); + } + return EFI_SUCCESS; } -- 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110879): https://edk2.groups.io/g/devel/message/110879 Mute This Topic: https://groups.io/mt/102435564/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
