Signed-off-by: Sheng Wei <w.sh...@intel.com> Cc: Eric Dong <eric.d...@intel.com> Cc: Ray Ni <ray...@intel.com> Cc: Laszlo Ersek <ler...@redhat.com> Cc: Wu Jiaxin <jiaxin...@intel.com> Cc: Tan Dun <dun....@intel.com> --- UefiCpuPkg/Include/Cet.inc | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 UefiCpuPkg/Include/Cet.inc
diff --git a/UefiCpuPkg/Include/Cet.inc b/UefiCpuPkg/Include/Cet.inc new file mode 100644 index 0000000000..a4038a0682 --- /dev/null +++ b/UefiCpuPkg/Include/Cet.inc @@ -0,0 +1,26 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2023, Intel Corporation. All rights reserved.<BR> +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +; Abstract: +; +; This file provides macro definitions for CET feature for NASM files. +; +;------------------------------------------------------------------------------ + +%define MSR_IA32_U_CET 0x6A0 +%define MSR_IA32_S_CET 0x6A2 +%define MSR_IA32_CET_SH_STK_EN 0x1 +%define MSR_IA32_CET_WR_SHSTK_EN 0x2 +%define MSR_IA32_CET_ENDBR_EN 0x4 +%define MSR_IA32_CET_LEG_IW_EN 0x8 +%define MSR_IA32_CET_NO_TRACK_EN 0x10 +%define MSR_IA32_CET_SUPPRESS_DIS 0x20 +%define MSR_IA32_CET_SUPPRESS 0x400 +%define MSR_IA32_CET_TRACKER 0x800 +%define MSR_IA32_PL0_SSP 0x6A4 +%define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8 + +%define CR4_CET_BIT 23 +%define CR4_CET 0x800000 -- 2.26.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111123): https://edk2.groups.io/g/devel/message/111123 Mute This Topic: https://groups.io/mt/102556833/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
