On Tue, Jan 16, 2024 at 08:48:34 +0100, Marcin Juszkiewicz wrote:
> During platform initialization we read amount of cpu cores and set
> PcdCoreCount so there is no need to call FdtHandler.
>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiew...@linaro.org>
> ---
> Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 6 ++----
> Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 10 ++++------
> .../Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 12
> +++---------
> 3 files changed, 9 insertions(+), 19 deletions(-)
>
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> index a34f54d431d4..8e2bf8c512f1 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> @@ -3,7 +3,7 @@
> #
> # Copyright (c) 2021, NUVIA Inc. All rights reserved.
> # Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> -# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +# Copyright (c) 2023, Linaro Ltd. All rights reserved.
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -29,8 +29,6 @@ [Packages]
>
> [LibraryClasses]
> BaseMemoryLib
> - FdtLib
> - FdtHelperLib
> IoLib
> PcdLib
>
> @@ -40,7 +38,6 @@ [Guids]
> [Pcd]
> gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease
> gArmTokenSpaceGuid.PcdSystemBiosRelease
> - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
>
> gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemManufacturer
> gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSystemSerialNumber
> @@ -56,3 +53,4 @@ [Pcd]
> gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisManufacturer
> gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisAssetTag
> gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdChassisSKU
> + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> index c38f2851904f..ab97768b5ddc 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> @@ -2,7 +2,7 @@
> * OemMiscLib.c
> *
> * Copyright (c) 2021, NUVIA Inc. All rights reserved.
> -* Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +* Copyright (c) Linaro Ltd. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> @@ -12,14 +12,12 @@
> #include <Guid/ZeroGuid.h>
> #include <Library/BaseMemoryLib.h>
> #include <Library/DebugLib.h>
> -#include <Library/FdtHelperLib.h>
> #include <Library/HiiLib.h>
> #include <Library/IoLib.h>
> #include <Library/OemMiscLib.h>
> #include <Library/PcdLib.h>
> #include <Library/SerialPortLib.h>
> #include <Library/TimerLib.h>
> -#include <libfdt.h>
>
> /** Returns whether the specified processor is present or not.
>
> @@ -33,7 +31,7 @@ OemIsProcessorPresent (
> UINTN ProcessorIndex
> )
> {
> - if (ProcessorIndex < FdtHelperCountCpus ()) {
> + if (ProcessorIndex < PcdGet32 (PcdCoreCount)) {
> return TRUE;
> }
>
> @@ -76,7 +74,7 @@ OemGetProcessorInformation (
> {
> UINT16 ProcessorCount;
>
> - ProcessorCount = FdtHelperCountCpus ();
> + ProcessorCount = PcdGet32 (PcdCoreCount);
>
> if (ProcessorIndex < ProcessorCount) {
> ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
> @@ -121,7 +119,7 @@ OemGetMaxProcessors (
> VOID
> )
> {
> - return FdtHelperCountCpus ();
> + return PcdGet32 (PcdCoreCount);
> }
>
> /** Gets information about the cache at the specified cache level.
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> index 9fb17151d7b8..7ef314ae9f67 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
> @@ -1,7 +1,7 @@
> /** @file
> * This file is an ACPI driver for the Qemu SBSA platform.
> *
> -* Copyright (c) 2020, Linaro Ltd. All rights reserved.
> +* Copyright (c) Linaro Ltd. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> @@ -255,7 +255,7 @@ AddMadtTable (
> // Initialize GIC Redistributor Structure
> EFI_ACPI_6_0_GICR_STRUCTURE Gicr = SBSAQEMU_MADT_GICR_INIT();
>
> - // Get CoreCount which was determined eariler after parsing device tree
> + // Get CoreCount which was determined earlier from TF-A
Where we got the information from no longer matters, since we've
abstracted that away.
/
Leif
> NumCores = PcdGet32 (PcdCoreCount);
>
> // Calculate the new table size based on the number of cores
> @@ -291,7 +291,7 @@ AddMadtTable (
> New += sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
>
> // Add new GICC structures for the Cores
> - for (CoreIndex = 0; CoreIndex < PcdGet32 (PcdCoreCount); CoreIndex++) {
> + for (CoreIndex = 0; CoreIndex < NumCores; CoreIndex++) {
> EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr;
>
> CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE));
> @@ -758,12 +758,6 @@ InitializeSbsaQemuAcpiDxe (
> {
> EFI_STATUS Status;
> EFI_ACPI_TABLE_PROTOCOL *AcpiTable;
> - UINT32 NumCores;
> -
> - // Parse the device tree and get the number of CPUs
> - NumCores = FdtHelperCountCpus ();
> - Status = PcdSet32S (PcdCoreCount, NumCores);
> - ASSERT_RETURN_ERROR (Status);
>
> // Check if ACPI Table Protocol has been installed
> Status = gBS->LocateProtocol (
>
> --
> 2.43.0
>
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