One fix is needed in the code. On Thu, Feb 29, 2024 at 2:04 PM Ray Ni <ray...@intel.com> wrote: > + // > + // Save the "Interrupted TPL" (TPL that was interrupted). > + // > + mInterruptedTplMask |= (UINTN)(1 << gEfiCurrentTpl); > + } > }
> + // > + // Clear interrupted TPL level mask, but do not re-enable interrupts > here > + // This will return to CoreTimerTick() and interrupts will be > re-enabled > + // when the timer interrupt handlers returns from interrupt context. > + // > + ASSERT ((INTN)gEfiCurrentTpl == HighBitSet64 (mInterruptedTplMask)); > + mInterruptedTplMask &= ~(UINTN)(1 << gEfiCurrentTpl); > + } > } Both of these need to use "1U" to avoid sign extending bit 31 into bits 31..63. The same issue is (in three places) present in my own version of the patch. :( Paolo -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116225): https://edk2.groups.io/g/devel/message/116225 Mute This Topic: https://groups.io/mt/104642317/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
