Reviewed-by: Min Xu <min.m...@intel.com> > -----Original Message----- > From: Sun, CepingX <cepingx....@intel.com> > Sent: Tuesday, February 27, 2024 5:19 AM > To: devel@edk2.groups.io > Cc: Sun, CepingX <cepingx....@intel.com>; Liming Gao > <gaolim...@byosoft.com.cn>; Kinney, Michael D > <michael.d.kin...@intel.com>; Aktas, Erdem <erdemak...@google.com>; > James Bottomley <j...@linux.ibm.com>; Yao, Jiewen > <jiewen....@intel.com>; Xu, Min M <min.m...@intel.com>; Tom Lendacky > <thomas.lenda...@amd.com>; Michael Roth <michael.r...@amd.com>; > Yamahata, Isaku <isaku.yamah...@intel.com> > Subject: [PATCH V1 1/3] MdePkg/BaseLib: Update > TDVMCALL_EXPOSE_REGS_MASK > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4696 > > Refer to the [GHCI] spec, TDVF should clear the BIT5 for RBP in the mask. > > Reference: > [GHCI]: TDX Guest-Host-Communication Interface v1.5 > https://cdrdv2.intel.com/v1/dl/getContent/726792 > > Cc: Liming Gao <gaolim...@byosoft.com.cn> > Cc: Michael D Kinney <michael.d.kin...@intel.com> > Cc: Erdem Aktas <erdemak...@google.com> > Cc: James Bottomley <j...@linux.ibm.com> > Cc: Jiewen Yao <jiewen....@intel.com> > Cc: Min Xu <min.m...@intel.com> > Cc: Tom Lendacky <thomas.lenda...@amd.com> > Cc: Michael Roth <michael.r...@amd.com> > Cc: Isaku Yamahata <isaku.yamah...@intel.com> > Signed-off-by: Ceping Sun <cepingx....@intel.com> > --- > MdePkg/Library/BaseLib/X64/TdVmcall.nasm | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/MdePkg/Library/BaseLib/X64/TdVmcall.nasm > b/MdePkg/Library/BaseLib/X64/TdVmcall.nasm > index 8dd9bfcbfa14..b20724a37015 100644 > --- a/MdePkg/Library/BaseLib/X64/TdVmcall.nasm > +++ b/MdePkg/Library/BaseLib/X64/TdVmcall.nasm > @@ -9,7 +9,7 @@ > DEFAULT REL > SECTION .text > > -%define TDVMCALL_EXPOSE_REGS_MASK 0xffec > +%define TDVMCALL_EXPOSE_REGS_MASK 0xffcc > %define TDVMCALL 0x0 > > %macro tdcall 0 > -- > 2.34.1
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