john wrote: > > On Oct 9, 2009, at 8:11 AM, Paul Fox wrote: > > > john wrote: > >> > >> I'm proposing a new GPIO map for XO-1.5 B3 and beyond. > >> > >> The changes are: > >> - Moved the control signals for the internal and external SD ports > >> and the WLAN around to match new port assignment. > >> > >> - The power control for the internal SD port (MSD_PWROFF) is provided > >> through a separate GPIO2 (instead of the faulty default output, > >> SDIO2PWOFF). > >> As there is an external pullup on this signal, there is no need to > >> enable the (default off) internal pullup. GPIO2 has been tested > >> by Via to remain powered and glitch-free in states S0/S3. > >> > >> - For B2 prototypes, I am proposing the use of GPIO2 as an ECO'd > >> power > >> control signal for the WLAN. > >> > >> - The DCONIRQ line has been moved (again). On B2, the interrupt > >> input chosen is synchronized by the RTC clock, preventing reliable > >> detection of DCON interrupts (which are one video line in > >> duration). > >> This time, it is connected to GPIO12, which is only powered in S0 > >> but can generate SCI/SMI interrupts and is not "owned" by ACPI. > >> > >> - The EC/CPU interrupt will also be routed to another pin capable > >> of generating SCI/SMI interrupts that is not "owned" by ACPI at the > >> request of pgf. It is routed to GPIO11, which is only powered > >> in S0. > >> This pin will be diode isolated from the other interrupt input > >> (powered > >> in S3.) Unfortunately, I can't find another interrupt input > >> not owned by ACPI that is powered in S3. > > > > if the DCONIRQ move proves successful, then that will free up > > SMBALRT (powered in S3) to be used for the EC. > > SMBALRT isn't "owned" by ACPI ?
not in as strong a sense as any of the GPE inputs. paul =--------------------- paul fox, p...@laptop.org _______________________________________________ Devel mailing list Devel@lists.laptop.org http://lists.laptop.org/listinfo/devel