>>>>> "Sebastien" == Sebastien Bourdeauducq <sebast...@milkymist.org> writes:
Sebastien> Yes if your goal is to make a generic AVR clone that everyone
Sebastien> can use with minimal homework, but mine was simply to get USB
Sebastien> to work on Milkymist.
When time allows, I'd like to extend navre to work with an external 16-bit
fast async SRAM where either by the boot process of by a boot loader the AVR
code is loaded to the SRAM. Navre would use this SRAM as PROGRAM ROM.
For external 10 ns SRAM I expect around 20 nsec PIN to PIN time for PROGRAM
ROM access versus about 4 ns in Blockram. This probably will still allow
for more than 16 MHZ that the CAN128 is rated at VCC=4.5V.
Typical applications here implement some (complicated) funktionality in FPGA
and some slow control via CAN bus in AVR. AT90CAN128 has enough power and
room for this, and Ethernut is a nice framework for that.
However interface between 5 V AVR and 3.3 Volt FPGA IO needs
lot of level shifters...
And XMEGA, which can run at 16 MHz at 3.3 Volt has no CAN Bus, and
availability is not too good.
Sebastien> However, if you implement those
Sebastien> features and send a proper patch that does not break anything
Sebastien> else, I'd happily merge it.
Find appended some patches to implement MOVW, JMP and CALL, where at least
the simulation suite doesn't indicate error. I didn't test impact on post
placement speed yet. 0001 is a documentation hint, 0005 is totally
untested and probably an GPIO approach as in XMEGA GPIO with
OUTCLR/OUTCLR/OUTTGL/etc makes more sense then implementing CBI/SBI with a
BITMASK send out by the core and evaluated by the devices.
Bye
--
Uwe Bonnes b...@elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
0001-UTF-8-q-According-20to-20J-C3-B6rg-20Wunsch-20-20in-.patch
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0002-Implement-MOVW.patch
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0003-Implement-JMP.patch
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0004-Implement-CALL.patch
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0005-Untested-try-to-implement-CBI-SBI-IO-Memory-must-eva.patch
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