- feature: support for dynamically switching EBA to DEBA via a GPIO.
- bug: EA now reports instruction that caused the data abort, rather than
next instruction.
---
cores/lm32/rtl/lm32_cpu.v | 34 ++++++++++++++++++++++++-------
cores/lm32/rtl/lm32_instruction_unit.v | 31 +++++++++++++++++++++++++++-
cores/lm32/rtl/lm32_top.v | 16 +++++++++++++++
3 files changed, 71 insertions(+), 10 deletions(-)
diff --git a/cores/lm32/rtl/lm32_cpu.v b/cores/lm32/rtl/lm32_cpu.v
index 0850ba6..14a1f3a 100644
--- a/cores/lm32/rtl/lm32_cpu.v
+++ b/cores/lm32/rtl/lm32_cpu.v
@@ -19,6 +19,11 @@
// Title : Top-level of CPU.
// Dependencies : lm32_include.v
//
+// Version 3.8
+// 1. Feature: Support for dynamically switching EBA to DEBA via a GPIO.
+// 2. Bug: EA now reports instruction that caused the data abort, rather than
+// next instruction.
+//
// Version 3.4
// 1. Bug Fix: In a tight infinite loop (add, sw, bi) incoming interrupts were
// never serviced.
@@ -75,6 +80,11 @@ module lm32_cpu (
clk_n_i,
`endif
rst_i,
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ at_debug,
+ `endif
+`endif
// From external devices
`ifdef CFG_INTERRUPTS_ENABLED
interrupt,
@@ -215,6 +225,12 @@ input clk_n_i; //
Inverted clock
`endif
input rst_i; // Reset
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ input at_debug; // GPIO input that maps EBA to
DEBA
+ `endif
+`endif
+
`ifdef CFG_INTERRUPTS_ENABLED
input [`LM32_INTERRUPT_RNG] interrupt; // Interrupt pins
`endif
@@ -543,7 +559,6 @@ reg rotate_x;
`endif
wire direction_d; // Which direction to shift in
reg direction_x;
-reg direction_m;
wire [`LM32_WORD_RNG] shifter_result_m; // Result of shifter
`endif
`ifdef CFG_MC_BARREL_SHIFT_ENABLED
@@ -763,6 +778,11 @@ lm32_instruction_unit #(
// ----- Inputs -------
.clk_i (clk_i),
.rst_i (rst_i),
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ .at_debug (at_debug),
+ `endif
+`endif
// From pipeline
.stall_a (stall_a),
.stall_f (stall_f),
@@ -800,7 +820,6 @@ lm32_instruction_unit #(
.i_dat_i (I_DAT_I),
.i_ack_i (I_ACK_I),
.i_err_i (I_ERR_I),
- .i_rty_i (I_RTY_I),
`endif
`ifdef CFG_HW_DEBUG_ENABLED
.jtag_read_enable (jtag_read_enable),
@@ -2352,9 +2371,6 @@ begin
exception_m <= `FALSE;
load_m <= `FALSE;
store_m <= `FALSE;
-`ifdef CFG_PL_BARREL_SHIFT_ENABLED
- direction_m <= `FALSE;
-`endif
write_enable_m <= `FALSE;
write_idx_m <= {`LM32_REG_IDX_WIDTH{1'b0}};
condition_met_m <= `FALSE;
@@ -2478,9 +2494,6 @@ begin
`endif
end
m_bypass_enable_m <= m_bypass_enable_x;
-`ifdef CFG_PL_BARREL_SHIFT_ENABLED
- direction_m <= direction_x;
-`endif
load_m <= load_x;
store_m <= store_x;
`ifdef CFG_FAST_UNCONDITIONAL_BRANCH
@@ -2512,6 +2525,10 @@ begin
`ifdef CFG_DEBUG_ENABLED
if (exception_x == `TRUE)
if ((dc_re == `TRUE)
+`ifdef CFG_ALTERNATE_EBA
+ || (at_debug == `TRUE)
+`endif
+
|| ((debug_exception_x == `TRUE)
&& (non_debug_exception_x == `FALSE)))
branch_target_m <= {deba, eid_x, {3{1'b0}}};
@@ -2582,6 +2599,7 @@ begin
`endif
`ifdef CFG_BUS_ERRORS_ENABLED
if ( (stall_m == `FALSE)
+ && (data_bus_error_exception == `FALSE)
&& ( (load_q_m == `TRUE)
|| (store_q_m == `TRUE)
)
diff --git a/cores/lm32/rtl/lm32_instruction_unit.v
b/cores/lm32/rtl/lm32_instruction_unit.v
index 014a0ed..ced6df6 100644
--- a/cores/lm32/rtl/lm32_instruction_unit.v
+++ b/cores/lm32/rtl/lm32_instruction_unit.v
@@ -42,6 +42,9 @@
// : instruction cache) to lock up in to an infinite loop due to
a
// : instruction bus error when EBA was set to instruction inline
// : memory.
+// Version : 3.8
+// : Feature: Support for dynamically switching EBA to DEBA via a
+// : GPIO.
//
=============================================================================
`include "lm32_include.v"
@@ -54,6 +57,11 @@ module lm32_instruction_unit (
// ----- Inputs -------
clk_i,
rst_i,
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ at_debug,
+ `endif
+`endif
// From pipeline
stall_a,
stall_f,
@@ -91,7 +99,6 @@ module lm32_instruction_unit (
i_dat_i,
i_ack_i,
i_err_i,
- i_rty_i,
`endif
`ifdef CFG_HW_DEBUG_ENABLED
jtag_read_enable,
@@ -162,6 +169,12 @@ localparam addr_offset_msb =
(addr_offset_lsb+addr_offset_width-1);
input clk_i; // Clock
input rst_i; // Reset
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ input at_debug; // GPIO input that
maps EBA to DEBA
+ `endif
+`endif
+
input stall_a; // Stall A stage
instruction
input stall_f; // Stall F stage
instruction
input stall_d; // Stall D stage
instruction
@@ -202,7 +215,6 @@ input irom_we_xm; //
Indicates if memory o
input [`LM32_WORD_RNG] i_dat_i; // Instruction
Wishbone interface read data
input i_ack_i; // Instruction
Wishbone interface acknowledgement
input i_err_i; // Instruction
Wishbone interface error
-input i_rty_i; // Instruction
Wishbone interface retry
`endif
`ifdef CFG_HW_DEBUG_ENABLED
@@ -336,6 +348,10 @@ reg bus_error_f; //
Indicates if a bus er
reg jtag_access; // Indicates if a JTAG
WB access is in progress
`endif
+`ifdef CFG_ALTERNATE_EBA
+reg alternate_eba_taken;
+`endif
+
/////////////////////////////////////////////////////
// Functions
/////////////////////////////////////////////////////
@@ -547,7 +563,18 @@ always @(posedge clk_i `CFG_RESET_SENSITIVITY)
begin
if (rst_i == `TRUE)
begin
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ if (at_debug == `TRUE)
+ pc_f <= (`CFG_DEBA_RESET-4)/4;
+ else
+ pc_f <= (`CFG_EBA_RESET-4)/4;
+ `else
+ pc_f <= (`CFG_EBA_RESET-4)/4;
+ `endif
+`else
pc_f <= (`CFG_EBA_RESET-4)/4;
+`endif
pc_d <= {`LM32_PC_WIDTH{1'b0}};
pc_x <= {`LM32_PC_WIDTH{1'b0}};
pc_m <= {`LM32_PC_WIDTH{1'b0}};
diff --git a/cores/lm32/rtl/lm32_top.v b/cores/lm32/rtl/lm32_top.v
index 9f28d0b..67db0a8 100644
--- a/cores/lm32/rtl/lm32_top.v
+++ b/cores/lm32/rtl/lm32_top.v
@@ -36,6 +36,11 @@ module lm32_top (
// ----- Inputs -------
clk_i,
rst_i,
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ at_debug,
+ `endif
+`endif
// From external devices
`ifdef CFG_INTERRUPTS_ENABLED
interrupt,
@@ -98,6 +103,12 @@ module lm32_top (
input clk_i; // Clock
input rst_i; // Reset
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ input at_debug; // GPIO input that maps EBA to
DEBA
+ `endif
+`endif
+
`ifdef CFG_INTERRUPTS_ENABLED
input [`LM32_INTERRUPT_RNG] interrupt; // Interrupt pins
`endif
@@ -223,6 +234,11 @@ lm32_cpu cpu (
.clk_n_i (clk_n),
`endif
.rst_i (rst_i),
+`ifdef CFG_DEBUG_ENABLED
+ `ifdef CFG_ALTERNATE_EBA
+ .at_debug (at_debug),
+ `endif
+`endif
// From external devices
`ifdef CFG_INTERRUPTS_ENABLED
.interrupt (interrupt),
--
1.7.2.5
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