On Sun, 2011-08-14 at 20:04 +0200, Michael Walle wrote: > This won't change the interrupts to level triggered one instead it > leave them as edge triggered but unifies them into one, pulsed > interrupt.
Combining several event sources on the same pulsed interrupt line cannot work reliably because of race conditions. Consider the following scenario: * software sends a character to UART for TX. * UART pulses interrupt. * processor enters ISR. * processor processes TX event. * UART is done receiving some character, and pulses interrupt again. * processor acks UART interrupt and leaves the ISR, acking _both_ events instead of only the processed one (TX). * the received character is probably lost. Maybe this is the bug you are seeing... Also, please: * reassign interrupts - since we are probably completely breaking software compatibility in the next major release because of level-sensitive interrupts, it does not make sense to leave a "hole" at interrupt 1. * update the documentation (.tex files) - no need to write a lot, but it's not good to give inaccurate information by making it out of sync with the hardware. Thanks! Sébastien _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
