Hi, I am trying to build and simulate the entire SoC using iverilog. I was wondering if there is some documentation or directions to do this. I see that /boards/milkymist-one/sources.mak has the full list of files to compile the entire SoC. It also looks like milkymist/boards/milkymist-one/rtl/system.v is the top file for the entire SoC. What I cannot find is the test bench for some test that runs with the full SoC RTL. Also the sources.mak uses a number of variables for different directory paths. I was wondering if there is any script that sets those or any scripts that compiles and simulates the full SoC. Thanks in advance for your time. Thanks, Vinay
_______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode
