two little things that improve the unittest harnesses. -- Robert Jordens.
From ea58542cd63f0ff5eb16954846b6babda24b5aec Mon Sep 17 00:00:00 2001 From: Robert Jordens <[email protected]> Date: Fri, 29 Nov 2013 23:32:13 -0700 Subject: [PATCH 1/5] migen/test/support: allow easy re-setUp of the testbench with different parameters
--- migen/test/support.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/migen/test/support.py b/migen/test/support.py index 016373d..913462a 100644 --- a/migen/test/support.py +++ b/migen/test/support.py @@ -12,8 +12,8 @@ class SimBench(Module): class SimCase(unittest.TestCase): TestBench = SimBench - def setUp(self): - self.tb = self.TestBench() + def setUp(self, *args, **kwargs): + self.tb = self.TestBench(*args, **kwargs) def test_to_verilog(self): verilog.convert(self.tb) -- 1.8.3.2
From a7472709c029d0ca93aed18464d8975d9f018dfb Mon Sep 17 00:00:00 2001 From: Robert Jordens <[email protected]> Date: Sat, 30 Nov 2013 06:51:24 -0700 Subject: [PATCH 2/5] migen/test: if SimCase is a TestCase, it's run in every module that imports it --- migen/test/support.py | 2 +- migen/test/test_coding.py | 6 +++--- migen/test/test_fifo.py | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/migen/test/support.py b/migen/test/support.py index 913462a..cc2fa68 100644 --- a/migen/test/support.py +++ b/migen/test/support.py @@ -9,7 +9,7 @@ class SimBench(Module): if self.callback is not None: return self.callback(self, s) -class SimCase(unittest.TestCase): +class SimCase(object): TestBench = SimBench def setUp(self, *args, **kwargs): diff --git a/migen/test/test_coding.py b/migen/test/test_coding.py index de09805..2d0f53d 100644 --- a/migen/test/test_coding.py +++ b/migen/test/test_coding.py @@ -5,7 +5,7 @@ from migen.genlib.coding import * from migen.test.support import SimCase, SimBench -class EncCase(SimCase): +class EncCase(SimCase, unittest.TestCase): class TestBench(SimBench): def __init__(self): self.submodules.dut = Encoder(8) @@ -29,7 +29,7 @@ class EncCase(SimCase): self.assertEqual(i, 1<<o) self.run_with(cb, 256) -class PrioEncCase(SimCase): +class PrioEncCase(SimCase, unittest.TestCase): class TestBench(SimBench): def __init__(self): self.submodules.dut = PriorityEncoder(8) @@ -55,7 +55,7 @@ class PrioEncCase(SimCase): self.assertGreaterEqual(i, 1<<o) self.run_with(cb, 256) -class DecCase(SimCase): +class DecCase(SimCase, unittest.TestCase): class TestBench(SimBench): def __init__(self): self.submodules.dut = Decoder(8) diff --git a/migen/test/test_fifo.py b/migen/test/test_fifo.py index c66f8d5..f9b789d 100644 --- a/migen/test/test_fifo.py +++ b/migen/test/test_fifo.py @@ -5,7 +5,7 @@ from migen.genlib.fifo import SyncFIFO, AsyncFIFO from migen.test.support import SimCase, SimBench -class SyncFIFOCase(SimCase): +class SyncFIFOCase(SimCase, unittest.TestCase): class TestBench(SimBench): def __init__(self): self.submodules.dut = SyncFIFO([("a", 32), ("b", 32)], 2) -- 1.8.3.2
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