Yann Sionneau commentted a whole ago; > instead of frequently do a ASID_FLUSH which is basically > stalling the CPU pipeline while iterating over the whole TLB > which takes something like 2*1024 clock cycles :)
That's one of the reason why most commercial CPUs have rather small TLB whose size is upto 32 entries or so, I think. Toru Nishimura / IND operation / ALKYL Technology _______________________________________________ Devel mailing list [email protected] https://ssl.serverraum.org/lists/listinfo/devel
