> [Severity: Medium]
> Can readers livelock on a PREEMPT_RT build here?

The vz10 kernels are not PREEMPT_RT: both x86_64 flavours build with
PREEMPT_VOLUNTARY and PREEMPT_RT unset. There spin_lock_irqsave() keeps
the write section atomic, readers on other CPUs spin for the DTE flush
only, and nothing in amd_iommu_update_and_flush_device_table() reads the
seqcount, so the writer cannot wait on itself. Tested with the section
held open for 5 ms at each of the three level increases: no lockups.

> Is there a way to publish the new root and mode only after the DTEs are
> updated, or to otherwise avoid holding the seqcount odd across the DTE
> flush?

On PREEMPT_RT a plain seqcount_t writer under a sleeping spinlock is
already broken before this patch, as the review notes. Fixing that means
publishing root and mode only after set_dte_entry() can take them
explicitly, as mainline does since 789a5913b29c. Not worth it for a
configuration we do not build.
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