Will implementation of phase fair RW locks be considered in this GSOC? I know I am very late to ask this question. I have read the concept and theory of phase fair RW locks from reference suggested in RTEMS( http://www.mpi-sws.org/~bbb/papers/pdf/rtsj11.pdf)
On Mon, Mar 21, 2016 at 12:02 PM, Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > > > On 19/03/16 02:35, Gedare Bloom wrote: > >> On Fri, Mar 18, 2016 at 6:03 PM, Павел Мовчан<movchan...@gmail.com> >> wrote: >> >>> >Hello all, >>> > >>> >I want to work with RTEMS and do some work for it. >>> >I find SMP and "Condition Variables"(status?) is very interesting for >>> me. I >>> >> SMP is moving fast right now. Sebastian Huber may have more to say on >> whether anything is worth trying for GSoC. >> >> > SMP and GSoC is maybe something for next year. The condition variables are > not suitable as a GSoC project. > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > > _______________________________________________ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel > -- Regards, Rahul Goradia Assistant Professor, Electronics and Communication Department, G H Patel College of Engineering and Technology. Contact Number : 9725203179
_______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel