On Thu, Mar 15, 2018 at 11:34 AM, Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote:
> > > On 15/03/18 05:56, Udit agarwal wrote: > >> +/* TRNG Register */ >> + >> +/* RNG base address */ >> > > Is the module name TRNG or RNG? > It's TRNG. I'll correct this. > > +#define RNG_BASE 0x48310000 >> +/* RNG clock control */ >> +#define CM_PER_RNG_CLKCTRL (AM335X_CM_PER_ADDR | (9 << 4)) >> > > This define is probably not for the TRNG register block. Should it move > the corresponding register block? > This define is to enable clock for TRNG module by setting the bit in the main clock register. Should i place this define with other CM definitions? > > +/* rng module clock status bits */ >> +#define AM335X_CLK_RNG_BIT_MASK (0x30000) >> +/* Offset from RNG base for output ready flag */ >> +#define RNG_STATUS_RDY (1u << 0) >> +/* Offset from RNG base for FRO related error */ >> +#define RNG_STATUS_ERR (1u << 1) >> +/* Offset from RNG base for clock status */ >> +#define RNG_STATUS_CLK (1u << 31) >> > > Are these offsets or bits? > I should have probably marked them as mask bits. > > +/* enable module */ >> +#define AM335X_RNG_ENABLE (1 << 10) >> + >> > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > >
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