Update #4180 --- bsps/arm/imxrt/include/fsl_device_registers.h | 57 ++++++++++--------- bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h | 6 ++ ..._nor_config.h => fsl_flexspi_nor_config.h} | 0 bsps/arm/imxrt/include/fsl_lpuart.h | 4 ++ bsps/arm/imxrt/include/fsl_pin_mux.h | 4 ++ .../nxp/boards/evkbimxrt1050/clock_config.c | 12 ++++ .../imxrt/nxp/boards/evkbimxrt1050/pin_mux.c | 6 ++ .../devices/MIMXRT1052/drivers/fsl_lpuart.c | 17 ++++++ 8 files changed, 80 insertions(+), 26 deletions(-) rename bsps/arm/imxrt/include/{evkbimxrt1050_flexspi_nor_config.h => fsl_flexspi_nor_config.h} (100%)
diff --git a/bsps/arm/imxrt/include/fsl_device_registers.h b/bsps/arm/imxrt/include/fsl_device_registers.h index 54caf43ca6..00c3fc7036 100644 --- a/bsps/arm/imxrt/include/fsl_device_registers.h +++ b/bsps/arm/imxrt/include/fsl_device_registers.h @@ -1,36 +1,41 @@ -/* - * Copyright 2014-2016 Freescale Semiconductor, Inc. - * Copyright 2016-2018 NXP - * All rights reserved. +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file * - * SPDX-License-Identifier: BSD-3-Clause + * @ingroup RTEMSBSPsARMimxrt * + * @brief Helper file for including registers for SDK drivers. */ -#ifndef __FSL_DEVICE_REGISTERS_H__ -#define __FSL_DEVICE_REGISTERS_H__ - /* - * Include the cpu specific register header files. + * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) * - * The CPU macro should be declared in the project or makefile. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ -#if (defined(CPU_MIMXRT1052CVJ5B) || defined(CPU_MIMXRT1052CVL5B) || defined(CPU_MIMXRT1052DVJ6B) || \ - defined(CPU_MIMXRT1052DVL6B)) - -#define MIMXRT1052_SERIES - -/* CMSIS-style register definitions */ -#include "MIMXRT1052.h" -/* CPU specific feature definitions */ -#include "MIMXRT1052_features.h" -#else - #error "No valid CPU defined!" -#endif +#ifndef FSL_DEVICE_REGISTERS_H +#define FSL_DEVICE_REGISTERS_H -#endif /* __FSL_DEVICE_REGISTERS_H__ */ +#include <chip.h> -/******************************************************************************* - * EOF - ******************************************************************************/ +#endif /* FSL_DEVICE_REGISTERS_H */ diff --git a/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h b/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h index 7b256f6670..56995eca55 100644 --- a/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h +++ b/bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h @@ -9,7 +9,9 @@ #define __FLEXSPI_NOR_BOOT_H__ #include <stdint.h> +#ifndef __rtems__ #include "board.h" +#endif /* __rtems__ */ /*! @name Driver version */ /*@{*/ @@ -85,6 +87,7 @@ typedef struct _ivt_ { #define FLASH_BASE ((uint32_t)__FLASH_BASE) #endif +#ifndef __rtems__ #if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE) #define DCD_ADDRESS dcd_data #else @@ -94,6 +97,7 @@ typedef struct _ivt_ { #define BOOT_DATA_ADDRESS &boot_data #define CSF_ADDRESS 0 #define IVT_RSVD (uint32_t)(0x00000000) +#endif /* __rtems__ */ /************************************* * Boot Data @@ -114,11 +118,13 @@ typedef struct _boot_data_ { #endif /* __rtems__ */ #define PLUGIN_FLAG (uint32_t)0 +#ifndef __rtems__ /* External Variables */ const BOOT_DATA_T boot_data; #if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE) extern const uint8_t dcd_data[]; #endif +#endif /* __rtems__ */ #endif /* __FLEXSPI_NOR_BOOT_H__ */ diff --git a/bsps/arm/imxrt/include/evkbimxrt1050_flexspi_nor_config.h b/bsps/arm/imxrt/include/fsl_flexspi_nor_config.h similarity index 100% rename from bsps/arm/imxrt/include/evkbimxrt1050_flexspi_nor_config.h rename to bsps/arm/imxrt/include/fsl_flexspi_nor_config.h diff --git a/bsps/arm/imxrt/include/fsl_lpuart.h b/bsps/arm/imxrt/include/fsl_lpuart.h index 6ec3534c81..fcf203dcf4 100644 --- a/bsps/arm/imxrt/include/fsl_lpuart.h +++ b/bsps/arm/imxrt/include/fsl_lpuart.h @@ -315,7 +315,11 @@ static inline void LPUART_SoftwareReset(LPUART_Type *base) * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source. * @retval kStatus_Success LPUART initialize succeed */ +#ifndef __rtems__ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz); +#else /* __rtems__ */ +status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz, bool do_reset); +#endif /* __rtems__ */ /*! * @brief Deinitializes a LPUART instance. diff --git a/bsps/arm/imxrt/include/fsl_pin_mux.h b/bsps/arm/imxrt/include/fsl_pin_mux.h index cb2ed43025..96e518412b 100644 --- a/bsps/arm/imxrt/include/fsl_pin_mux.h +++ b/bsps/arm/imxrt/include/fsl_pin_mux.h @@ -13,6 +13,10 @@ #ifndef _PIN_MUX_H_ #define _PIN_MUX_H_ +#ifdef __rtems__ +#include <bsp/start.h> +#endif /* __rtems__ */ + /*********************************************************************************************************************** * Definitions **********************************************************************************************************************/ diff --git a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c index 2ed6638cbe..c23d5da356 100644 --- a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c +++ b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c @@ -30,7 +30,11 @@ processor_version: 0.0.0 board: IMXRT1050-EVKB * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ +#ifndef __rtems__ #include "clock_config.h" +#else /* __rtems__ */ +#include "fsl_clock_config.h" +#endif /* __rtems__ */ #include "fsl_iomuxc.h" /******************************************************************************* @@ -41,7 +45,11 @@ board: IMXRT1050-EVKB * Variables ******************************************************************************/ /* System clock frequency. */ +#ifndef __rtems__ extern uint32_t SystemCoreClock; +#else /* __rtems__ */ +uint32_t SystemCoreClock; +#endif /* __rtems__ */ /******************************************************************************* ************************ BOARD_InitBootClocks function ************************ @@ -216,6 +224,7 @@ void BOARD_BootClockRUN(void) CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1); /* Set Usdhc2 clock source. */ CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); +#ifndef __rtems__ /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left * unchanged. @@ -242,6 +251,7 @@ void BOARD_BootClockRUN(void) /* Set Flexspi clock source. */ CLOCK_SetMux(kCLOCK_FlexspiMux, 1); #endif +#endif /* __rtems__ */ /* Disable CSI clock gate. */ CLOCK_DisableClock(kCLOCK_Csi); /* Set CSI_PODF. */ @@ -353,6 +363,7 @@ void BOARD_BootClockRUN(void) CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); /* Init ARM PLL. */ CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN); +#ifndef __rtems__ /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as @@ -389,6 +400,7 @@ void BOARD_BootClockRUN(void) /* Disable Usb1 PLL output for USBPHY1. */ CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; #endif +#endif /* __rtems__ */ /* DeInit Audio PLL. */ CLOCK_DeinitAudioPll(); /* Bypass Audio PLL. */ diff --git a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c index 25ca313926..acb13cfdc2 100644 --- a/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c +++ b/bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c @@ -270,6 +270,9 @@ BOARD_InitDEBUG_UARTPins: * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ +#ifdef __rtems__ +BSP_START_TEXT_SECTION +#endif /* __rtems__ */ void BOARD_InitDEBUG_UARTPins(void) { CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ @@ -355,6 +358,9 @@ BOARD_InitSDRAMPins: * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ +#ifdef __rtems__ +BSP_START_TEXT_SECTION +#endif /* __rtems__ */ void BOARD_InitSDRAMPins(void) { CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ diff --git a/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c b/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c index 379fd8aec0..2f02aabe16 100644 --- a/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c +++ b/bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c @@ -240,7 +240,11 @@ static void LPUART_ReadNonBlocking(LPUART_Type *base, uint8_t *data, size_t leng * retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source. * retval kStatus_Success LPUART initialize succeed */ +#ifndef __rtems__ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz) +#else /* __rtems__ */ +status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz, bool do_reset) +#endif /* __rtems__ */ { assert(NULL != config); assert(0U < config->baudRate_Bps); @@ -286,6 +290,7 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t } } +#ifndef __rtems__ /* Check to see if actual baud rate is within 3% of desired baud rate * based on the best calculate OSR value */ if (baudDiff > ((config->baudRate_Bps / 100U) * 3U)) @@ -294,6 +299,12 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t status = kStatus_LPUART_BaudrateNotSupport; } else +#else /* __rtems__ */ + /* + * Better to have any baudrate then none. With this change, the function can + * not fail any more. + */ +#endif /* __rtems__ */ { #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) @@ -309,7 +320,13 @@ status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t #if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL /*Reset all internal logic and registers, except the Global Register */ +#ifndef __rtems__ LPUART_SoftwareReset(base); +#else /* __rtems__ */ + if (do_reset) { + LPUART_SoftwareReset(base); + } +#endif /* __rtems__ */ #else /* Disable LPUART TX RX before setting. */ base->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK); -- 2.26.2 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel