Hello Rajiv, The project is a bit advanced. To be able to use MMU, RTEMS has to be ported to RISC-V's S-Mode. I created a ticket for that a few years ago [1]. This needs a decent understanding of RISC-V and non-trivial efforts to refactor RTEMS and its exception/interrupt handling, context-switching, emulation layers and calls to M-Mode, etc. I am not sure that (porting to S-Mode and supporting MMU) could fit in a GSoC project.
[1] https://devel.rtems.org/ticket/3337 On Fri, 26 Mar 2021 at 12:25, Rajiv Vaidyanathan <rajiv.vaidyanath...@gmail.com> wrote: > > Dear Hesham, > > Thank you for providing information about the RISC-V MMU. I want to know what > work has to be done in improving MMU in RISC-V and if it can be a GSoC > project. It would be great if you could provide the details regarding this. > > Thanks and regards, > Rajiv > > On Wed, 24 Mar 2021 at 00:03, Hesham Almatary <hesham.almat...@cl.cam.ac.uk> > wrote: >> >> On Tue, 23 Mar 2021 at 17:14, Gedare Bloom <ged...@rtems.org> wrote: >> > >> > CC: Hesham >> > CC: devel >> > >> > On Tue, Mar 23, 2021 at 6:34 AM Rajiv Vaidyanathan >> > <rajiv.vaidyanath...@gmail.com> wrote: >> > > >> > > Dear Gedare, >> > > >> > > Thank you for providing information regarding the project. For risk-v >> > > MMU support, will I require to have hardware? >> > > >> > That's a good question. I don't know if the current risc-v simulators >> > support the risc-v mmu. maybe, another expert could advise. I have >> > CC'd someone with experience in both risc-v and memory protection. >> > >> Yes, both Spike and QEMU have MMU and PMP support. >> >> > Let's keep technical discussions on the mailing list. Thanks. >> > >> > > Thanks and regards, >> > > Rajiv >> > > >> > > On Mon, 22 Mar 2021 at 21:54, Gedare Bloom <ged...@rtems.org> wrote: >> > >> >> > >> Hi Rajiv, >> > >> >> > >> On Sat, Mar 20, 2021 at 12:40 AM Rajiv Vaidyanathan >> > >> <rajiv.vaidyanath...@gmail.com> wrote: >> > >> > >> > >> > Hello RTEMS community, >> > >> > >> > >> > I am interested in the ticket: Memory protection. I saw that this >> > >> > topic has been pursued a few times in GSoC. It would be great if >> > >> > someone can let me know the current status of this project and guide >> > >> > me about what are the contributions that can be done this year. >> > >> > >> > >> Yes, this is a frequently attempted project that slowly makes progress >> > >> over time. I think that Utkarsh has gotten somewhat close to a >> > >> workable solution, but there were some design flaws in his approach >> > >> for task stack protection (mainly, iterating over all the tasks) that >> > >> are still lingering. >> > >> >> > >> There could be enough work here to pick up from his progress. The >> > >> major issue would be figuring out what the final state of his code is >> > >> in, and to dig in to the design and implementation details to write a >> > >> concrete proposal how to bring task stack protection to a production >> > >> state. There may be other directions to consider as well, such as >> > >> improving the risc-v MMU support perhaps. >> > >> >> > >> > Thanks and regards, >> > >> > Rajiv >> > >> > _______________________________________________ >> > >> > devel mailing list >> > >> > devel@rtems.org >> > >> > http://lists.rtems.org/mailman/listinfo/devel >> > _______________________________________________ >> > devel mailing list >> > devel@rtems.org >> > http://lists.rtems.org/mailman/listinfo/devel _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
