- Remove cpufunc.h, bus.h and _bus.h from rtemsbd. Otherwise the same
files will be installed for all target architectures which can lead to
incompatibilities
- Instead use the machine dependent header files from freebsd
---
freebsd/sys/arm/include/machine/_bus.h | 47 +
freebsd/sys/arm/include/machine/bus.h | 769 ++++++++++++++++
freebsd/sys/arm64/include/machine/_bus.h | 46 +
freebsd/sys/arm64/include/machine/bus.h | 469 ++++++++++
freebsd/sys/powerpc/include/machine/_bus.h | 50 +
freebsd/sys/powerpc/include/machine/bus.h | 467 ++++++++++
freebsd/sys/riscv/include/machine/_bus.h | 46 +
freebsd/sys/riscv/include/machine/bus.h | 469 ++++++++++
freebsd/sys/riscv/include/machine/cpufunc.h | 135 +++
freebsd/sys/riscv/include/machine/riscvreg.h | 246 +++++
.../sys/sparc}/include/machine/_bus.h | 0
.../sys/sparc}/include/machine/bus.h | 0
freebsd/sys/sparc/include/machine/cpufunc.h | 0
freebsd/sys/sparc64/include/machine/_bus.h | 41 +
freebsd/sys/sparc64/include/machine/bus.h | 852 ++++++++++++++++++
rtemsbsd/include/machine/cpufunc.h | 1 -
16 files changed, 3637 insertions(+), 1 deletion(-)
create mode 100644 freebsd/sys/arm/include/machine/_bus.h
create mode 100644 freebsd/sys/arm/include/machine/bus.h
create mode 100644 freebsd/sys/arm64/include/machine/_bus.h
create mode 100644 freebsd/sys/arm64/include/machine/bus.h
create mode 100644 freebsd/sys/powerpc/include/machine/_bus.h
create mode 100644 freebsd/sys/powerpc/include/machine/bus.h
create mode 100644 freebsd/sys/riscv/include/machine/_bus.h
create mode 100644 freebsd/sys/riscv/include/machine/bus.h
create mode 100644 freebsd/sys/riscv/include/machine/cpufunc.h
create mode 100644 freebsd/sys/riscv/include/machine/riscvreg.h
rename {rtemsbsd => freebsd/sys/sparc}/include/machine/_bus.h (100%)
rename {rtemsbsd => freebsd/sys/sparc}/include/machine/bus.h (100%)
create mode 100644 freebsd/sys/sparc/include/machine/cpufunc.h
create mode 100644 freebsd/sys/sparc64/include/machine/_bus.h
create mode 100644 freebsd/sys/sparc64/include/machine/bus.h
delete mode 100644 rtemsbsd/include/machine/cpufunc.h
diff --git a/freebsd/sys/arm/include/machine/_bus.h
b/freebsd/sys/arm/include/machine/_bus.h
new file mode 100644
index 00000000..9bb51e98
--- /dev/null
+++ b/freebsd/sys/arm/include/machine/_bus.h
@@ -0,0 +1,47 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2005 M. Warner Losh.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef ARM_INCLUDE__BUS_H
+#define ARM_INCLUDE__BUS_H
+
+/*
+ * Addresses (in bus space).
+ */
+typedef u_long bus_addr_t;
+typedef u_long bus_size_t;
+
+/*
+ * Access methods for bus space.
+ */
+typedef struct bus_space *bus_space_tag_t;
+typedef u_long bus_space_handle_t;
+
+#endif /* ARM_INCLUDE__BUS_H */
diff --git a/freebsd/sys/arm/include/machine/bus.h
b/freebsd/sys/arm/include/machine/bus.h
new file mode 100644
index 00000000..37994f68
--- /dev/null
+++ b/freebsd/sys/arm/include/machine/bus.h
@@ -0,0 +1,769 @@
+/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
+ * SPDX-License-Identifier: BSD-4-Clause
+ *
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_BUS_H_
+#define _MACHINE_BUS_H_
+
+#include <machine/_bus.h>
+
+/*
+ * int bus_space_map (bus_space_tag_t t, bus_addr_t addr,
+ * bus_size_t size, int flags, bus_space_handle_t *bshp);
+ *
+ * Map a region of bus space.
+ */
+
+#define BUS_SPACE_MAP_CACHEABLE 0x01
+#define BUS_SPACE_MAP_LINEAR 0x02
+#define BUS_SPACE_MAP_PREFETCHABLE 0x04
+
+/*
+ * Bus space for ARM.
+ *
+ * The functions used most often are grouped together at the beginning to
ensure
+ * that all the data fits into a single cache line. The inline implementations
+ * of single read/write access these values a lot.
+ */
+struct bus_space {
+ /* Read/write single and barrier: the most commonly used functions. */
+ uint8_t (*bs_r_1)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+ uint32_t (*bs_r_4)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+ void (*bs_w_1)(bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint8_t);
+ void (*bs_w_4)(bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t);
+ void (*bs_barrier)(bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, bus_size_t, int);
+
+ /* Backlink to parent (if copied), and implementation private data. */
+ struct bus_space *bs_parent;
+ void *bs_privdata;
+
+ /* mapping/unmapping */
+ int (*bs_map) (bus_space_tag_t, bus_addr_t, bus_size_t,
+ int, bus_space_handle_t *);
+ void (*bs_unmap) (bus_space_tag_t, bus_space_handle_t,
bus_size_t);
+ int (*bs_subregion) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, bus_size_t, bus_space_handle_t *);
+
+ /* allocation/deallocation */
+ int (*bs_alloc) (bus_space_tag_t, bus_addr_t, bus_addr_t,
+ bus_size_t, bus_size_t, bus_size_t, int,
+ bus_addr_t *, bus_space_handle_t *);
+ void (*bs_free) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t);
+
+ /* Read single, the less commonly used functions. */
+ uint16_t (*bs_r_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t);
+ uint64_t (*bs_r_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t);
+
+ /* read multiple */
+ void (*bs_rm_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ uint8_t *, bus_size_t);
+ void (*bs_rm_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ uint16_t *, bus_size_t);
+ void (*bs_rm_4) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rm_8) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* read region */
+ void (*bs_rr_1) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint8_t *, bus_size_t);
+ void (*bs_rr_2) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint16_t *, bus_size_t);
+ void (*bs_rr_4) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rr_8) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* Write single, the less commonly used functions. */
+ void (*bs_w_2) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint16_t);
+ void (*bs_w_8) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t);
+
+ /* write multiple */
+ void (*bs_wm_1) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wm_2) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wm_4) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wm_8) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+
+ /* write region */
+ void (*bs_wr_1) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wr_2) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wr_4) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wr_8) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+
+ /* set multiple */
+ void (*bs_sm_1) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint8_t, bus_size_t);
+ void (*bs_sm_2) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint16_t, bus_size_t);
+ void (*bs_sm_4) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t, bus_size_t);
+ void (*bs_sm_8) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t, bus_size_t);
+
+ /* set region */
+ void (*bs_sr_1) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint8_t, bus_size_t);
+ void (*bs_sr_2) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint16_t, bus_size_t);
+ void (*bs_sr_4) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t, bus_size_t);
+ void (*bs_sr_8) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t, bus_size_t);
+
+ /* copy */
+ void (*bs_c_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_4) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+
+ /* read stream (single) */
+ uint8_t (*bs_r_1_s) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
+ uint16_t (*bs_r_2_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t);
+ uint32_t (*bs_r_4_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t);
+ uint64_t (*bs_r_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t);
+
+ /* read multiple stream */
+ void (*bs_rm_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ uint8_t *, bus_size_t);
+ void (*bs_rm_2_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t,
+ uint16_t *, bus_size_t);
+ void (*bs_rm_4_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rm_8_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* read region stream */
+ void (*bs_rr_1_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint8_t *, bus_size_t);
+ void (*bs_rr_2_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint16_t *, bus_size_t);
+ void (*bs_rr_4_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t *, bus_size_t);
+ void (*bs_rr_8_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t *, bus_size_t);
+
+ /* write stream (single) */
+ void (*bs_w_1_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint8_t);
+ void (*bs_w_2_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint16_t);
+ void (*bs_w_4_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint32_t);
+ void (*bs_w_8_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, uint64_t);
+
+ /* write multiple stream */
+ void (*bs_wm_1_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wm_2_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wm_4_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wm_8_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+
+ /* write region stream */
+ void (*bs_wr_1_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint8_t *, bus_size_t);
+ void (*bs_wr_2_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint16_t *, bus_size_t);
+ void (*bs_wr_4_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint32_t *, bus_size_t);
+ void (*bs_wr_8_s) (bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, const uint64_t *, bus_size_t);
+};
+
+#if __ARM_ARCH < 6
+extern bus_space_tag_t arm_base_bs_tag;
+#endif
+
+/*
+ * Utility macros; INTERNAL USE ONLY.
+ */
+#define __bs_c(a,b) __CONCAT(a,b)
+#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
+
+#define __bs_nonsingle(type, sz, t, h, o, a, c)
\
+ (*(t)->__bs_opname(type,sz))((t), h, o, a, c)
+#define __bs_set(type, sz, t, h, o, v, c)
\
+ (*(t)->__bs_opname(type,sz))((t), h, o, v, c)
+#define __bs_copy(sz, t, h1, o1, h2, o2, cnt)
\
+ (*(t)->__bs_opname(c,sz))((t), h1, o1, h2, o2, cnt)
+
+#define __bs_opname_s(op,size)
__bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
+#define __bs_rs_s(sz, t, h, o)
\
+ (*(t)->__bs_opname_s(r,sz))((t), h, o)
+#define __bs_ws_s(sz, t, h, o, v)
\
+ (*(t)->__bs_opname_s(w,sz))((t), h, o, v)
+#define __bs_nonsingle_s(type, sz, t, h, o, a, c)
\
+ (*(t)->__bs_opname_s(type,sz))((t), h, o, a, c)
+
+
+#define __generate_inline_bs_rs(IFN, MBR, TYP)
\
+ static inline TYP \
+ IFN(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o) \
+ { \
+ \
+ if (__predict_true(t->MBR == NULL)) \
+ return (*(volatile TYP *)(h + o)); \
+ else \
+ return (t->MBR(t, h, o)); \
+ }
+
+#define __generate_inline_bs_ws(IFN, MBR, TYP)
\
+ static inline void \
+ IFN(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, TYP v)\
+ { \
+ \
+ if (__predict_true(t->MBR == NULL)) \
+ *(volatile TYP *)(h + o) = v; \
+ else \
+ t->MBR(t, h, o, v); \
+ }
+
+/*
+ * Mapping and unmapping operations.
+ */
+#define bus_space_map(t, a, s, c, hp)
\
+ (*(t)->bs_map)((t), (a), (s), (c), (hp))
+#define bus_space_unmap(t, h, s)
\
+ (*(t)->bs_unmap)((t), (h), (s))
+#define bus_space_subregion(t, h, o, s, hp)
\
+ (*(t)->bs_subregion)((t), (h), (o), (s), (hp))
+
+
+/*
+ * Allocation and deallocation operations.
+ */
+#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp)
\
+ (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), \
+ (c), (ap), (hp))
+#define bus_space_free(t, h, s)
\
+ (*(t)->bs_free)((t), (h), (s))
+
+/*
+ * Bus barrier operations.
+ */
+#define bus_space_barrier(t, h, o, l, f)
\
+ (*(t)->bs_barrier)((t), (h), (o), (l), (f))
+
+#define BUS_SPACE_BARRIER_READ 0x01
+#define BUS_SPACE_BARRIER_WRITE 0x02
+
+/*
+ * Bus read (single) operations.
+ */
+__generate_inline_bs_rs(bus_space_read_1, bs_r_1, uint8_t);
+__generate_inline_bs_rs(bus_space_read_2, bs_r_2, uint16_t);
+__generate_inline_bs_rs(bus_space_read_4, bs_r_4, uint32_t);
+__generate_inline_bs_rs(bus_space_read_8, bs_r_8, uint64_t);
+
+__generate_inline_bs_rs(bus_space_read_stream_1, bs_r_1_s, uint8_t);
+__generate_inline_bs_rs(bus_space_read_stream_2, bs_r_2_s, uint16_t);
+__generate_inline_bs_rs(bus_space_read_stream_4, bs_r_4_s, uint32_t);
+__generate_inline_bs_rs(bus_space_read_stream_8, bs_r_8_s, uint64_t);
+
+/*
+ * Bus read multiple operations.
+ */
+#define bus_space_read_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_multi_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus read region operations.
+ */
+#define bus_space_read_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_region_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus write (single) operations.
+ */
+__generate_inline_bs_ws(bus_space_write_1, bs_w_1, uint8_t);
+__generate_inline_bs_ws(bus_space_write_2, bs_w_2, uint16_t);
+__generate_inline_bs_ws(bus_space_write_4, bs_w_4, uint32_t);
+__generate_inline_bs_ws(bus_space_write_8, bs_w_8, uint64_t);
+
+__generate_inline_bs_ws(bus_space_write_stream_1, bs_w_1_s, uint8_t);
+__generate_inline_bs_ws(bus_space_write_stream_2, bs_w_2_s, uint16_t);
+__generate_inline_bs_ws(bus_space_write_stream_4, bs_w_4_s, uint32_t);
+__generate_inline_bs_ws(bus_space_write_stream_8, bs_w_8_s, uint64_t);
+
+
+/*
+ * Bus write multiple operations.
+ */
+#define bus_space_write_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_multi_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus write region operations.
+ */
+#define bus_space_write_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_region_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Set multiple operations.
+ */
+#define bus_space_set_multi_1(t, h, o, v, c)
\
+ __bs_set(sm,1,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_2(t, h, o, v, c)
\
+ __bs_set(sm,2,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_4(t, h, o, v, c)
\
+ __bs_set(sm,4,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_8(t, h, o, v, c)
\
+ __bs_set(sm,8,(t),(h),(o),(v),(c))
+
+
+/*
+ * Set region operations.
+ */
+#define bus_space_set_region_1(t, h, o, v, c)
\
+ __bs_set(sr,1,(t),(h),(o),(v),(c))
+#define bus_space_set_region_2(t, h, o, v, c)
\
+ __bs_set(sr,2,(t),(h),(o),(v),(c))
+#define bus_space_set_region_4(t, h, o, v, c)
\
+ __bs_set(sr,4,(t),(h),(o),(v),(c))
+#define bus_space_set_region_8(t, h, o, v, c)
\
+ __bs_set(sr,8,(t),(h),(o),(v),(c))
+
+
+/*
+ * Copy operations.
+ */
+#define bus_space_copy_region_1(t, h1, o1, h2, o2, c)
\
+ __bs_copy(1, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_2(t, h1, o1, h2, o2, c)
\
+ __bs_copy(2, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_4(t, h1, o1, h2, o2, c)
\
+ __bs_copy(4, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_8(t, h1, o1, h2, o2, c)
\
+ __bs_copy(8, t, h1, o1, h2, o2, c)
+
+/*
+ * Macros to provide prototypes for all the functions used in the
+ * bus_space structure
+ */
+
+#define bs_map_proto(f)
\
+int __bs_c(f,_bs_map) (bus_space_tag_t t, bus_addr_t addr, \
+ bus_size_t size, int cacheable, bus_space_handle_t *bshp);
+
+#define bs_unmap_proto(f) \
+void __bs_c(f,_bs_unmap) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t size);
+
+#define bs_subregion_proto(f) \
+int __bs_c(f,_bs_subregion) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, bus_size_t size, \
+ bus_space_handle_t *nbshp);
+
+#define bs_alloc_proto(f) \
+int __bs_c(f,_bs_alloc) (bus_space_tag_t t, bus_addr_t rstart,
\
+ bus_addr_t rend, bus_size_t size, bus_size_t align, \
+ bus_size_t boundary, int cacheable, bus_addr_t *addrp, \
+ bus_space_handle_t *bshp);
+
+#define bs_free_proto(f) \
+void __bs_c(f,_bs_free) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t size);
+
+#define bs_mmap_proto(f) \
+int __bs_c(f,_bs_mmap) (struct cdev *, vm_offset_t, vm_paddr_t *, int);
+
+#define bs_barrier_proto(f) \
+void __bs_c(f,_bs_barrier) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, bus_size_t len, int flags);
+
+#define bs_r_1_proto(f)
\
+uint8_t __bs_c(f,_bs_r_1) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset);
+
+#define bs_r_2_proto(f)
\
+uint16_t __bs_c(f,_bs_r_2) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset);
+
+#define bs_r_4_proto(f)
\
+uint32_t __bs_c(f,_bs_r_4) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset);
+
+#define bs_r_8_proto(f)
\
+uint64_t __bs_c(f,_bs_r_8) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset);
+
+#define bs_r_1_s_proto(f)
\
+uint8_t __bs_c(f,_bs_r_1_s) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset);
+
+#define bs_r_2_s_proto(f)
\
+uint16_t __bs_c(f,_bs_r_2_s) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset);
+
+#define bs_r_4_s_proto(f)
\
+uint32_t __bs_c(f,_bs_r_4_s) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset);
+
+#define bs_w_1_proto(f)
\
+void __bs_c(f,_bs_w_1) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, uint8_t value);
+
+#define bs_w_2_proto(f)
\
+void __bs_c(f,_bs_w_2) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, uint16_t value);
+
+#define bs_w_4_proto(f)
\
+void __bs_c(f,_bs_w_4) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, uint32_t value);
+
+#define bs_w_8_proto(f)
\
+void __bs_c(f,_bs_w_8) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, uint64_t value);
+
+#define bs_w_1_s_proto(f)
\
+void __bs_c(f,_bs_w_1_s) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, uint8_t value);
+
+#define bs_w_2_s_proto(f)
\
+void __bs_c(f,_bs_w_2_s) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, uint16_t value);
+
+#define bs_w_4_s_proto(f)
\
+void __bs_c(f,_bs_w_4_s) (bus_space_tag_t t, bus_space_handle_t bsh,
\
+ bus_size_t offset, uint32_t value);
+
+#define bs_rm_1_proto(f)
\
+void __bs_c(f,_bs_rm_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+
+#define bs_rm_2_proto(f)
\
+void __bs_c(f,_bs_rm_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t *addr, bus_size_t count);
+
+#define bs_rm_4_proto(f)
\
+void __bs_c(f,_bs_rm_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t *addr, bus_size_t count);
+
+#define bs_rm_8_proto(f)
\
+void __bs_c(f,_bs_rm_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t *addr, bus_size_t count);
+
+#define bs_wm_1_proto(f)
\
+void __bs_c(f,_bs_wm_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+
+#define bs_wm_2_proto(f)
\
+void __bs_c(f,_bs_wm_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint16_t *addr, bus_size_t count);
+
+#define bs_wm_4_proto(f)
\
+void __bs_c(f,_bs_wm_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint32_t *addr, bus_size_t count);
+
+#define bs_wm_8_proto(f)
\
+void __bs_c(f,_bs_wm_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint64_t *addr, bus_size_t count);
+
+#define bs_rr_1_proto(f)
\
+void __bs_c(f, _bs_rr_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t *addr, bus_size_t count);
+
+#define bs_rr_2_proto(f)
\
+void __bs_c(f, _bs_rr_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t *addr, bus_size_t count);
+
+#define bs_rr_4_proto(f)
\
+void __bs_c(f, _bs_rr_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t *addr, bus_size_t count);
+
+#define bs_rr_8_proto(f)
\
+void __bs_c(f, _bs_rr_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t *addr, bus_size_t count);
+
+#define bs_wr_1_proto(f)
\
+void __bs_c(f, _bs_wr_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint8_t *addr, bus_size_t count);
+
+#define bs_wr_2_proto(f)
\
+void __bs_c(f, _bs_wr_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint16_t *addr, bus_size_t count);
+
+#define bs_wr_4_proto(f)
\
+void __bs_c(f, _bs_wr_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint32_t *addr, bus_size_t count);
+
+#define bs_wr_8_proto(f)
\
+void __bs_c(f, _bs_wr_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, const uint64_t *addr, bus_size_t count);
+
+#define bs_sm_1_proto(f)
\
+void __bs_c(f,_bs_sm_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t value, bus_size_t count);
+
+#define bs_sm_2_proto(f)
\
+void __bs_c(f,_bs_sm_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value, bus_size_t count);
+
+#define bs_sm_4_proto(f)
\
+void __bs_c(f,_bs_sm_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value, bus_size_t count);
+
+#define bs_sm_8_proto(f)
\
+void __bs_c(f,_bs_sm_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value, bus_size_t count);
+
+#define bs_sr_1_proto(f)
\
+void __bs_c(f,_bs_sr_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint8_t value, bus_size_t count);
+
+#define bs_sr_2_proto(f)
\
+void __bs_c(f,_bs_sr_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint16_t value, bus_size_t count);
+
+#define bs_sr_4_proto(f)
\
+void __bs_c(f,_bs_sr_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint32_t value, bus_size_t count);
+
+#define bs_sr_8_proto(f)
\
+void __bs_c(f,_bs_sr_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
+ bus_size_t offset, uint64_t value, bus_size_t count);
+
+#define bs_c_1_proto(f)
\
+void __bs_c(f,_bs_c_1) (bus_space_tag_t t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_c_2_proto(f)
\
+void __bs_c(f,_bs_c_2) (bus_space_tag_t t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_c_4_proto(f)
\
+void __bs_c(f,_bs_c_4) (bus_space_tag_t t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_c_8_proto(f)
\
+void __bs_c(f,_bs_c_8) (bus_space_tag_t t, bus_space_handle_t bsh1, \
+ bus_size_t offset1, bus_space_handle_t bsh2, \
+ bus_size_t offset2, bus_size_t count);
+
+#define bs_protos(f) \
+bs_map_proto(f); \
+bs_unmap_proto(f); \
+bs_subregion_proto(f); \
+bs_alloc_proto(f); \
+bs_free_proto(f); \
+bs_mmap_proto(f); \
+bs_barrier_proto(f); \
+bs_r_1_proto(f); \
+bs_r_2_proto(f); \
+bs_r_4_proto(f); \
+bs_r_8_proto(f); \
+bs_r_1_s_proto(f); \
+bs_r_2_s_proto(f); \
+bs_r_4_s_proto(f); \
+bs_w_1_proto(f); \
+bs_w_2_proto(f); \
+bs_w_4_proto(f); \
+bs_w_8_proto(f); \
+bs_w_1_s_proto(f); \
+bs_w_2_s_proto(f); \
+bs_w_4_s_proto(f); \
+bs_rm_1_proto(f); \
+bs_rm_2_proto(f); \
+bs_rm_4_proto(f); \
+bs_rm_8_proto(f); \
+bs_wm_1_proto(f); \
+bs_wm_2_proto(f); \
+bs_wm_4_proto(f); \
+bs_wm_8_proto(f); \
+bs_rr_1_proto(f); \
+bs_rr_2_proto(f); \
+bs_rr_4_proto(f); \
+bs_rr_8_proto(f); \
+bs_wr_1_proto(f); \
+bs_wr_2_proto(f); \
+bs_wr_4_proto(f); \
+bs_wr_8_proto(f); \
+bs_sm_1_proto(f); \
+bs_sm_2_proto(f); \
+bs_sm_4_proto(f); \
+bs_sm_8_proto(f); \
+bs_sr_1_proto(f); \
+bs_sr_2_proto(f); \
+bs_sr_4_proto(f); \
+bs_sr_8_proto(f); \
+bs_c_1_proto(f); \
+bs_c_2_proto(f); \
+bs_c_4_proto(f); \
+bs_c_8_proto(f);
+
+void generic_bs_unimplemented(void);
+#define BS_UNIMPLEMENTED (void *)generic_bs_unimplemented
+
+#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
+
+#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
+#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
+#define BUS_SPACE_MAXADDR 0xFFFFFFFF
+#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
+#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
+#define BUS_SPACE_MAXSIZE 0xFFFFFFFF
+
+#define BUS_SPACE_UNRESTRICTED (~0)
+
+#include <machine/bus_dma.h>
+
+/*
+ * Get the physical address of a bus space memory-mapped resource.
+ * Doing this as a macro is a temporary solution until a more robust fix is
+ * designed. It also serves to mark the locations needing that fix.
+ */
+#define BUS_SPACE_PHYSADDR(res, offs) \
+ ((u_int)(rman_get_start(res)+(offs)))
+
+#endif /* _MACHINE_BUS_H_ */
diff --git a/freebsd/sys/arm64/include/machine/_bus.h
b/freebsd/sys/arm64/include/machine/_bus.h
new file mode 100644
index 00000000..f11991f6
--- /dev/null
+++ b/freebsd/sys/arm64/include/machine/_bus.h
@@ -0,0 +1,46 @@
+/*-
+ * Copyright (c) 2005 M. Warner Losh.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE__BUS_H_
+#define _MACHINE__BUS_H_
+
+/*
+ * Addresses (in bus space).
+ */
+typedef u_long bus_addr_t;
+typedef u_long bus_size_t;
+
+/*
+ * Access methods for bus space.
+ */
+typedef u_long bus_space_handle_t;
+typedef struct bus_space *bus_space_tag_t;
+
+#endif /* !_MACHINE__BUS_H_ */
diff --git a/freebsd/sys/arm64/include/machine/bus.h
b/freebsd/sys/arm64/include/machine/bus.h
new file mode 100644
index 00000000..8aaf1d3e
--- /dev/null
+++ b/freebsd/sys/arm64/include/machine/bus.h
@@ -0,0 +1,469 @@
+/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * From: sys/arm/include/bus.h
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_BUS_H_
+#define _MACHINE_BUS_H_
+
+#include <machine/_bus.h>
+
+#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
+
+#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFFUL
+#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFFUL
+#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFFUL
+#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFFUL
+
+#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFUL
+#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFFUL
+
+#define BUS_SPACE_MAP_CACHEABLE 0x01
+#define BUS_SPACE_MAP_LINEAR 0x02
+#define BUS_SPACE_MAP_PREFETCHABLE 0x04
+
+#define BUS_SPACE_UNRESTRICTED (~0)
+
+#define BUS_SPACE_BARRIER_READ 0x01
+#define BUS_SPACE_BARRIER_WRITE 0x02
+
+
+struct bus_space {
+ /* cookie */
+ void *bs_cookie;
+
+ /* mapping/unmapping */
+ int (*bs_map) (void *, bus_addr_t, bus_size_t,
+ int, bus_space_handle_t *);
+ void (*bs_unmap) (void *, bus_space_handle_t, bus_size_t);
+ int (*bs_subregion) (void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, bus_space_handle_t *);
+
+ /* allocation/deallocation */
+ int (*bs_alloc) (void *, bus_addr_t, bus_addr_t,
+ bus_size_t, bus_size_t, bus_size_t, int,
+ bus_addr_t *, bus_space_handle_t *);
+ void (*bs_free) (void *, bus_space_handle_t,
+ bus_size_t);
+
+ /* get kernel virtual address */
+ /* barrier */
+ void (*bs_barrier) (void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, int);
+
+ /* read single */
+ u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t);
+ u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t);
+ u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t);
+ u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple */
+ void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t,
+ u_int8_t *, bus_size_t);
+ void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t,
+ u_int16_t *, bus_size_t);
+ void (*bs_rm_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rm_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* read region */
+ void (*bs_rr_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t *, bus_size_t);
+ void (*bs_rr_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t *, bus_size_t);
+ void (*bs_rr_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rr_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* write single */
+ void (*bs_w_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t);
+ void (*bs_w_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t);
+ void (*bs_w_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t);
+ void (*bs_w_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t);
+
+ /* write multiple */
+ void (*bs_wm_1) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wm_2) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wm_4) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wm_8) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* write region */
+ void (*bs_wr_1) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wr_2) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wr_4) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wr_8) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* set multiple */
+ void (*bs_sm_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t, bus_size_t);
+ void (*bs_sm_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t, bus_size_t);
+ void (*bs_sm_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t, bus_size_t);
+ void (*bs_sm_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t, bus_size_t);
+
+ /* set region */
+ void (*bs_sr_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t, bus_size_t);
+ void (*bs_sr_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t, bus_size_t);
+ void (*bs_sr_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t, bus_size_t);
+ void (*bs_sr_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t, bus_size_t);
+
+ /* copy */
+ void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+
+ /* read single stream */
+ u_int8_t (*bs_r_1_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int16_t (*bs_r_2_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int32_t (*bs_r_4_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int64_t (*bs_r_8_s) (void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple stream */
+ void (*bs_rm_1_s) (void *, bus_space_handle_t, bus_size_t,
+ u_int8_t *, bus_size_t);
+ void (*bs_rm_2_s) (void *, bus_space_handle_t, bus_size_t,
+ u_int16_t *, bus_size_t);
+ void (*bs_rm_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rm_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* read region stream */
+ void (*bs_rr_1_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t *, bus_size_t);
+ void (*bs_rr_2_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t *, bus_size_t);
+ void (*bs_rr_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rr_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* write single stream */
+ void (*bs_w_1_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t);
+ void (*bs_w_2_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t);
+ void (*bs_w_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t);
+ void (*bs_w_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t);
+
+ /* write multiple stream */
+ void (*bs_wm_1_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wm_2_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wm_4_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wm_8_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* write region stream */
+ void (*bs_wr_1_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wr_2_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wr_4_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wr_8_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+};
+
+
+/*
+ * Utility macros; INTERNAL USE ONLY.
+ */
+#define __bs_c(a,b) __CONCAT(a,b)
+#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
+
+#define __bs_rs(sz, t, h, o)
\
+ (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
+#define __bs_ws(sz, t, h, o, v)
\
+ (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
+#define __bs_nonsingle(type, sz, t, h, o, a, c)
\
+ (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
+#define __bs_set(type, sz, t, h, o, v, c)
\
+ (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
+#define __bs_copy(sz, t, h1, o1, h2, o2, cnt)
\
+ (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
+
+#define __bs_opname_s(op,size)
__bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
+#define __bs_rs_s(sz, t, h, o)
\
+ (*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o)
+#define __bs_ws_s(sz, t, h, o, v)
\
+ (*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v)
+#define __bs_nonsingle_s(type, sz, t, h, o, a, c)
\
+ (*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c)
+
+
+/*
+ * Mapping and unmapping operations.
+ */
+#define bus_space_map(t, a, s, c, hp)
\
+ (*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
+#define bus_space_unmap(t, h, s)
\
+ (*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
+#define bus_space_subregion(t, h, o, s, hp)
\
+ (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
+
+
+/*
+ * Allocation and deallocation operations.
+ */
+#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp)
\
+ (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
+ (c), (ap), (hp))
+#define bus_space_free(t, h, s)
\
+ (*(t)->bs_free)((t)->bs_cookie, (h), (s))
+
+/*
+ * Bus barrier operations.
+ */
+#define bus_space_barrier(t, h, o, l, f)
\
+ (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
+
+
+
+/*
+ * Bus read (single) operations.
+ */
+#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
+#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
+#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
+#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
+
+#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t), (h),
(o))
+#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t), (h),
(o))
+#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t), (h),
(o))
+#define bus_space_read_stream_8(t, h, o)
__bs_rs_s(8,8,(t),(h),(o))
+
+/*
+ * Bus read multiple operations.
+ */
+#define bus_space_read_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_multi_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus read region operations.
+ */
+#define bus_space_read_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_region_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus write (single) operations.
+ */
+#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
+#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
+#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
+#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
+
+#define bus_space_write_stream_1(t, h, o, v)
__bs_ws_s(1,(t),(h),(o),(v))
+#define bus_space_write_stream_2(t, h, o, v)
__bs_ws_s(2,(t),(h),(o),(v))
+#define bus_space_write_stream_4(t, h, o, v)
__bs_ws_s(4,(t),(h),(o),(v))
+#define bus_space_write_stream_8(t, h, o, v)
__bs_ws_s(8,(t),(h),(o),(v))
+
+
+/*
+ * Bus write multiple operations.
+ */
+#define bus_space_write_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_multi_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus write region operations.
+ */
+#define bus_space_write_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_region_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Set multiple operations.
+ */
+#define bus_space_set_multi_1(t, h, o, v, c)
\
+ __bs_set(sm,1,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_2(t, h, o, v, c)
\
+ __bs_set(sm,2,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_4(t, h, o, v, c)
\
+ __bs_set(sm,4,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_8(t, h, o, v, c)
\
+ __bs_set(sm,8,(t),(h),(o),(v),(c))
+
+
+/*
+ * Set region operations.
+ */
+#define bus_space_set_region_1(t, h, o, v, c)
\
+ __bs_set(sr,1,(t),(h),(o),(v),(c))
+#define bus_space_set_region_2(t, h, o, v, c)
\
+ __bs_set(sr,2,(t),(h),(o),(v),(c))
+#define bus_space_set_region_4(t, h, o, v, c)
\
+ __bs_set(sr,4,(t),(h),(o),(v),(c))
+#define bus_space_set_region_8(t, h, o, v, c)
\
+ __bs_set(sr,8,(t),(h),(o),(v),(c))
+
+
+/*
+ * Copy operations.
+ */
+#define bus_space_copy_region_1(t, h1, o1, h2, o2, c)
\
+ __bs_copy(1, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_2(t, h1, o1, h2, o2, c)
\
+ __bs_copy(2, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_4(t, h1, o1, h2, o2, c)
\
+ __bs_copy(4, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_8(t, h1, o1, h2, o2, c)
\
+ __bs_copy(8, t, h1, o1, h2, o2, c)
+
+#include <machine/bus_dma.h>
+
+#endif /* _MACHINE_BUS_H_ */
diff --git a/freebsd/sys/powerpc/include/machine/_bus.h
b/freebsd/sys/powerpc/include/machine/_bus.h
new file mode 100644
index 00000000..d39fb003
--- /dev/null
+++ b/freebsd/sys/powerpc/include/machine/_bus.h
@@ -0,0 +1,50 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2005 M. Warner Losh.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef POWERPC_INCLUDE__BUS_H
+#define POWERPC_INCLUDE__BUS_H
+
+#include <vm/vm_param.h>
+
+/*
+ * Bus address and size types
+ */
+typedef vm_paddr_t bus_addr_t;
+typedef vm_size_t bus_size_t;
+
+/*
+ * Access methods for bus resources and address space.
+ */
+typedef struct bus_space *bus_space_tag_t;
+typedef vm_offset_t bus_space_handle_t;
+
+#endif /* POWERPC_INCLUDE__BUS_H */
diff --git a/freebsd/sys/powerpc/include/machine/bus.h
b/freebsd/sys/powerpc/include/machine/bus.h
new file mode 100644
index 00000000..f45678f6
--- /dev/null
+++ b/freebsd/sys/powerpc/include/machine/bus.h
@@ -0,0 +1,467 @@
+/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
+
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-4-Clause
+ *
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_BUS_H_
+#define _MACHINE_BUS_H_
+
+#include <machine/_bus.h>
+
+#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
+
+#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFFUL
+#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFFUL
+#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFFUL
+#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFFUL
+
+#ifdef __powerpc64__
+#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFUL
+#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFFUL
+#else
+#ifdef BOOKE
+#define BUS_SPACE_MAXADDR 0xFFFFFFFFFULL
+#define BUS_SPACE_MAXSIZE 0xFFFFFFFFUL
+#else
+#define BUS_SPACE_MAXADDR 0xFFFFFFFFUL
+#define BUS_SPACE_MAXSIZE 0xFFFFFFFFUL
+#endif
+#endif
+
+#define BUS_SPACE_MAP_CACHEABLE 0x01
+#define BUS_SPACE_MAP_LINEAR 0x02
+#define BUS_SPACE_MAP_PREFETCHABLE 0x04
+
+#define BUS_SPACE_UNRESTRICTED (~0)
+
+#define BUS_SPACE_BARRIER_READ 0x01
+#define BUS_SPACE_BARRIER_WRITE 0x02
+
+struct bus_space_access;
+
+struct bus_space {
+ /* mapping/unmapping */
+ int (*bs_map)(bus_addr_t, bus_size_t, int,
+ bus_space_handle_t *);
+ void (*bs_unmap)(bus_size_t);
+ int (*bs_subregion)(bus_space_handle_t, bus_size_t,
+ bus_size_t, bus_space_handle_t *);
+
+ /* allocation/deallocation */
+ int (*bs_alloc)(bus_addr_t, bus_addr_t, bus_size_t,
+ bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
+ void (*bs_free)(bus_space_handle_t, bus_size_t);
+
+ void (*bs_barrier)(bus_space_handle_t, bus_size_t,
+ bus_size_t, int);
+
+ /* Read single. */
+ uint8_t (*bs_r_1)(bus_space_handle_t, bus_size_t);
+ uint16_t (*bs_r_2)(bus_space_handle_t, bus_size_t);
+ uint32_t (*bs_r_4)(bus_space_handle_t, bus_size_t);
+ uint64_t (*bs_r_8)(bus_space_handle_t, bus_size_t);
+
+ uint16_t (*bs_r_s_2)(bus_space_handle_t, bus_size_t);
+ uint32_t (*bs_r_s_4)(bus_space_handle_t, bus_size_t);
+ uint64_t (*bs_r_s_8)(bus_space_handle_t, bus_size_t);
+
+ /* read multiple */
+ void (*bs_rm_1)(bus_space_handle_t, bus_size_t, uint8_t *,
+ bus_size_t);
+ void (*bs_rm_2)(bus_space_handle_t, bus_size_t, uint16_t *,
+ bus_size_t);
+ void (*bs_rm_4)(bus_space_handle_t, bus_size_t, uint32_t *,
+ bus_size_t);
+ void (*bs_rm_8)(bus_space_handle_t, bus_size_t, uint64_t *,
+ bus_size_t);
+
+ void (*bs_rm_s_2)(bus_space_handle_t, bus_size_t, uint16_t *,
+ bus_size_t);
+ void (*bs_rm_s_4)(bus_space_handle_t, bus_size_t, uint32_t *,
+ bus_size_t);
+ void (*bs_rm_s_8)(bus_space_handle_t, bus_size_t, uint64_t *,
+ bus_size_t);
+
+ /* read region */
+ void (*bs_rr_1)(bus_space_handle_t, bus_size_t, uint8_t *,
+ bus_size_t);
+ void (*bs_rr_2)(bus_space_handle_t, bus_size_t, uint16_t *,
+ bus_size_t);
+ void (*bs_rr_4)(bus_space_handle_t, bus_size_t, uint32_t *,
+ bus_size_t);
+ void (*bs_rr_8)(bus_space_handle_t, bus_size_t, uint64_t *,
+ bus_size_t);
+
+ void (*bs_rr_s_2)(bus_space_handle_t, bus_size_t, uint16_t *,
+ bus_size_t);
+ void (*bs_rr_s_4)(bus_space_handle_t, bus_size_t, uint32_t *,
+ bus_size_t);
+ void (*bs_rr_s_8)(bus_space_handle_t, bus_size_t, uint64_t *,
+ bus_size_t);
+
+ /* write */
+ void (*bs_w_1)(bus_space_handle_t, bus_size_t, uint8_t);
+ void (*bs_w_2)(bus_space_handle_t, bus_size_t, uint16_t);
+ void (*bs_w_4)(bus_space_handle_t, bus_size_t, uint32_t);
+ void (*bs_w_8)(bus_space_handle_t, bus_size_t, uint64_t);
+
+ void (*bs_w_s_2)(bus_space_handle_t, bus_size_t, uint16_t);
+ void (*bs_w_s_4)(bus_space_handle_t, bus_size_t, uint32_t);
+ void (*bs_w_s_8)(bus_space_handle_t, bus_size_t, uint64_t);
+
+ /* write multiple */
+ void (*bs_wm_1)(bus_space_handle_t, bus_size_t,
+ const uint8_t *, bus_size_t);
+ void (*bs_wm_2)(bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void (*bs_wm_4)(bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void (*bs_wm_8)(bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
+ void (*bs_wm_s_2)(bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void (*bs_wm_s_4)(bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void (*bs_wm_s_8)(bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
+ /* write region */
+ void (*bs_wr_1)(bus_space_handle_t, bus_size_t,
+ const uint8_t *, bus_size_t);
+ void (*bs_wr_2)(bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void (*bs_wr_4)(bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void (*bs_wr_8)(bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
+ void (*bs_wr_s_2)(bus_space_handle_t, bus_size_t,
+ const uint16_t *, bus_size_t);
+ void (*bs_wr_s_4)(bus_space_handle_t, bus_size_t,
+ const uint32_t *, bus_size_t);
+ void (*bs_wr_s_8)(bus_space_handle_t, bus_size_t,
+ const uint64_t *, bus_size_t);
+
+ /* set multiple */
+ void (*bs_sm_1)(bus_space_handle_t, bus_size_t, uint8_t,
+ bus_size_t);
+ void (*bs_sm_2)(bus_space_handle_t, bus_size_t, uint16_t,
+ bus_size_t);
+ void (*bs_sm_4)(bus_space_handle_t, bus_size_t, uint32_t,
+ bus_size_t);
+ void (*bs_sm_8)(bus_space_handle_t, bus_size_t, uint64_t,
+ bus_size_t);
+
+ void (*bs_sm_s_2)(bus_space_handle_t, bus_size_t, uint16_t,
+ bus_size_t);
+ void (*bs_sm_s_4)(bus_space_handle_t, bus_size_t, uint32_t,
+ bus_size_t);
+ void (*bs_sm_s_8)(bus_space_handle_t, bus_size_t, uint64_t,
+ bus_size_t);
+
+ /* set region */
+ void (*bs_sr_1)(bus_space_handle_t, bus_size_t, uint8_t,
+ bus_size_t);
+ void (*bs_sr_2)(bus_space_handle_t, bus_size_t, uint16_t,
+ bus_size_t);
+ void (*bs_sr_4)(bus_space_handle_t, bus_size_t, uint32_t,
+ bus_size_t);
+ void (*bs_sr_8)(bus_space_handle_t, bus_size_t, uint64_t,
+ bus_size_t);
+
+ void (*bs_sr_s_2)(bus_space_handle_t, bus_size_t, uint16_t,
+ bus_size_t);
+ void (*bs_sr_s_4)(bus_space_handle_t, bus_size_t, uint32_t,
+ bus_size_t);
+ void (*bs_sr_s_8)(bus_space_handle_t, bus_size_t, uint64_t,
+ bus_size_t);
+
+ /* copy region */
+ void (*bs_cr_1)(bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_cr_2)(bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_cr_4)(bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_cr_8)(bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+
+ void (*bs_cr_s_2)(bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_cr_s_4)(bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_cr_s_8)(bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+};
+
+extern struct bus_space bs_be_tag;
+extern struct bus_space bs_le_tag;
+
+#define __bs_c(a,b) __CONCAT(a,b)
+#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
+
+#define __bs_rs(sz, t, h, o)
\
+ (*(t)->__bs_opname(r,sz))(h, o)
+#define __bs_ws(sz, t, h, o, v) \
+ (*(t)->__bs_opname(w,sz))(h, o, v)
+#define __bs_nonsingle(type, sz, t, h, o, a, c)
\
+ (*(t)->__bs_opname(type,sz))(h, o, a, c)
+#define __bs_set(type, sz, t, h, o, v, c)
\
+ (*(t)->__bs_opname(type,sz))(h, o, v, c)
+#define __bs_copy(sz, t, h1, o1, h2, o2, cnt)
\
+ (*(t)->__bs_opname(c,sz))(h1, o1, h2, o2, cnt)
+
+/*
+ * Mapping and unmapping operations.
+ */
+#define bus_space_map(t, a, s, c, hp) (*(t)->bs_map)(a, s, c, hp)
+#define bus_space_unmap(t, h, s) (*(t)->bs_unmap)(h, s)
+#define bus_space_subregion(t, h, o, s, hp) (*(t)->bs_subregion)(h,
o, s, hp)
+
+/*
+ * Allocation and deallocation operations.
+ */
+#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \
+ (*(t)->bs_alloc)(rs, re, s, a, b, c, ap, hp)
+#define bus_space_free(t, h, s) \
+ (*(t)->bs_free)(h, s)
+
+/*
+ * Bus barrier operations.
+ */
+#define bus_space_barrier(t, h, o, l, f) (*(t)->bs_barrier)(h,
o, l, f)
+
+/*
+ * Bus read (single) operations.
+ */
+#define bus_space_read_1(t, h, o) __bs_rs(1,t,h,o)
+#define bus_space_read_2(t, h, o) __bs_rs(2,t,h,o)
+#define bus_space_read_4(t, h, o) __bs_rs(4,t,h,o)
+#define bus_space_read_8(t, h, o) __bs_rs(8,t,h,o)
+
+#define bus_space_read_stream_1 bus_space_read_1
+#define bus_space_read_stream_2(t, h, o) __bs_rs(s_2,t,h,o)
+#define bus_space_read_stream_4(t, h, o) __bs_rs(s_4,t,h,o)
+#define bus_space_read_stream_8(t, h, o) __bs_rs(s_8,t,h,o)
+
+/*
+ * Bus read multiple operations.
+ */
+#define bus_space_read_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_multi_stream_1 bus_space_read_multi_1
+#define bus_space_read_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle(rm,s_2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle(rm,s_4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle(rm,s_8,(t),(h),(o),(a),(c))
+
+/*
+ * Bus read region operations.
+ */
+#define bus_space_read_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_region_stream_1 bus_space_read_region_1
+#define bus_space_read_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle(rr,s_2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle(rr,s_4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle(rr,s_8,(t),(h),(o),(a),(c))
+
+/*
+ * Bus write (single) operations.
+ */
+#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
+#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
+#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
+#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
+
+#define bus_space_write_stream_1 bus_space_write_1
+#define bus_space_write_stream_2(t, h, o, v)
__bs_ws(s_2,(t),(h),(o),(v))
+#define bus_space_write_stream_4(t, h, o, v)
__bs_ws(s_4,(t),(h),(o),(v))
+#define bus_space_write_stream_8(t, h, o, v)
__bs_ws(s_8,(t),(h),(o),(v))
+
+/*
+ * Bus write multiple operations.
+ */
+#define bus_space_write_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_multi_stream_1 bus_space_write_multi_1
+#define bus_space_write_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle(wm,s_2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle(wm,s_4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle(wm,s_8,(t),(h),(o),(a),(c))
+
+/*
+ * Bus write region operations.
+ */
+#define bus_space_write_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_region_stream_1 bus_space_write_region_1
+#define bus_space_write_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle(wr,s_2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle(wr,s_4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle(wr,s_8,(t),(h),(o),(a),(c))
+
+/*
+ * Set multiple operations.
+ */
+#define bus_space_set_multi_1(t, h, o, v, c)
\
+ __bs_set(sm,1,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_2(t, h, o, v, c)
\
+ __bs_set(sm,2,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_4(t, h, o, v, c)
\
+ __bs_set(sm,4,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_8(t, h, o, v, c)
\
+ __bs_set(sm,8,(t),(h),(o),(v),(c))
+
+#define bus_space_set_multi_stream_1 bus_space_set_multi_1
+#define bus_space_set_multi_stream_2(t, h, o, v, c)
\
+ __bs_set(sm,s_2,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_stream_4(t, h, o, v, c)
\
+ __bs_set(sm,s_4,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_stream_8(t, h, o, v, c)
\
+ __bs_set(sm,s_8,(t),(h),(o),(v),(c))
+
+/*
+ * Set region operations.
+ */
+#define bus_space_set_region_1(t, h, o, v, c)
\
+ __bs_set(sr,1,(t),(h),(o),(v),(c))
+#define bus_space_set_region_2(t, h, o, v, c)
\
+ __bs_set(sr,2,(t),(h),(o),(v),(c))
+#define bus_space_set_region_4(t, h, o, v, c)
\
+ __bs_set(sr,4,(t),(h),(o),(v),(c))
+#define bus_space_set_region_8(t, h, o, v, c)
\
+ __bs_set(sr,8,(t),(h),(o),(v),(c))
+
+#define bus_space_set_region_stream_1 bus_space_set_region_1
+#define bus_space_set_region_stream_2(t, h, o, v, c)
\
+ __bs_set(sr,s_2,(t),(h),(o),(v),(c))
+#define bus_space_set_region_stream_4(t, h, o, v, c)
\
+ __bs_set(sr,s_4,(t),(h),(o),(v),(c))
+#define bus_space_set_region_stream_8(t, h, o, v, c)
\
+ __bs_set(sr,s_8,(t),(h),(o),(v),(c))
+
+#if 0
+/*
+ * Copy operations.
+ */
+#define bus_space_copy_region_1(t, h1, o1, h2, o2, c)
\
+ __bs_copy(1, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_2(t, h1, o1, h2, o2, c)
\
+ __bs_copy(2, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_4(t, h1, o1, h2, o2, c)
\
+ __bs_copy(4, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_8(t, h1, o1, h2, o2, c)
\
+ __bs_copy(8, t, h1, o1, h2, o2, c)
+
+#define bus_space_copy_region_stream_1 bus_space_copy_region_1
+#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c)
\
+ __bs_copy(s_2, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c)
\
+ __bs_copy(s_4, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_stream_8(t, h1, o1, h2, o2, c)
\
+ __bs_copy(s_8, t, h1, o1, h2, o2, c)
+#endif
+
+#include <machine/bus_dma.h>
+
+#endif /* _MACHINE_BUS_H_ */
diff --git a/freebsd/sys/riscv/include/machine/_bus.h
b/freebsd/sys/riscv/include/machine/_bus.h
new file mode 100644
index 00000000..f11991f6
--- /dev/null
+++ b/freebsd/sys/riscv/include/machine/_bus.h
@@ -0,0 +1,46 @@
+/*-
+ * Copyright (c) 2005 M. Warner Losh.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE__BUS_H_
+#define _MACHINE__BUS_H_
+
+/*
+ * Addresses (in bus space).
+ */
+typedef u_long bus_addr_t;
+typedef u_long bus_size_t;
+
+/*
+ * Access methods for bus space.
+ */
+typedef u_long bus_space_handle_t;
+typedef struct bus_space *bus_space_tag_t;
+
+#endif /* !_MACHINE__BUS_H_ */
diff --git a/freebsd/sys/riscv/include/machine/bus.h
b/freebsd/sys/riscv/include/machine/bus.h
new file mode 100644
index 00000000..8aaf1d3e
--- /dev/null
+++ b/freebsd/sys/riscv/include/machine/bus.h
@@ -0,0 +1,469 @@
+/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * From: sys/arm/include/bus.h
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_BUS_H_
+#define _MACHINE_BUS_H_
+
+#include <machine/_bus.h>
+
+#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
+
+#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFFUL
+#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFFUL
+#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFFUL
+#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFFUL
+
+#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFUL
+#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFFUL
+
+#define BUS_SPACE_MAP_CACHEABLE 0x01
+#define BUS_SPACE_MAP_LINEAR 0x02
+#define BUS_SPACE_MAP_PREFETCHABLE 0x04
+
+#define BUS_SPACE_UNRESTRICTED (~0)
+
+#define BUS_SPACE_BARRIER_READ 0x01
+#define BUS_SPACE_BARRIER_WRITE 0x02
+
+
+struct bus_space {
+ /* cookie */
+ void *bs_cookie;
+
+ /* mapping/unmapping */
+ int (*bs_map) (void *, bus_addr_t, bus_size_t,
+ int, bus_space_handle_t *);
+ void (*bs_unmap) (void *, bus_space_handle_t, bus_size_t);
+ int (*bs_subregion) (void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, bus_space_handle_t *);
+
+ /* allocation/deallocation */
+ int (*bs_alloc) (void *, bus_addr_t, bus_addr_t,
+ bus_size_t, bus_size_t, bus_size_t, int,
+ bus_addr_t *, bus_space_handle_t *);
+ void (*bs_free) (void *, bus_space_handle_t,
+ bus_size_t);
+
+ /* get kernel virtual address */
+ /* barrier */
+ void (*bs_barrier) (void *, bus_space_handle_t,
+ bus_size_t, bus_size_t, int);
+
+ /* read single */
+ u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t);
+ u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t);
+ u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t);
+ u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple */
+ void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t,
+ u_int8_t *, bus_size_t);
+ void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t,
+ u_int16_t *, bus_size_t);
+ void (*bs_rm_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rm_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* read region */
+ void (*bs_rr_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t *, bus_size_t);
+ void (*bs_rr_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t *, bus_size_t);
+ void (*bs_rr_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rr_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* write single */
+ void (*bs_w_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t);
+ void (*bs_w_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t);
+ void (*bs_w_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t);
+ void (*bs_w_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t);
+
+ /* write multiple */
+ void (*bs_wm_1) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wm_2) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wm_4) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wm_8) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* write region */
+ void (*bs_wr_1) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wr_2) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wr_4) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wr_8) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* set multiple */
+ void (*bs_sm_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t, bus_size_t);
+ void (*bs_sm_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t, bus_size_t);
+ void (*bs_sm_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t, bus_size_t);
+ void (*bs_sm_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t, bus_size_t);
+
+ /* set region */
+ void (*bs_sr_1) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t, bus_size_t);
+ void (*bs_sr_2) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t, bus_size_t);
+ void (*bs_sr_4) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t, bus_size_t);
+ void (*bs_sr_8) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t, bus_size_t);
+
+ /* copy */
+ void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+ void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t,
+ bus_space_handle_t, bus_size_t, bus_size_t);
+
+ /* read single stream */
+ u_int8_t (*bs_r_1_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int16_t (*bs_r_2_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int32_t (*bs_r_4_s) (void *, bus_space_handle_t, bus_size_t);
+ u_int64_t (*bs_r_8_s) (void *, bus_space_handle_t, bus_size_t);
+
+ /* read multiple stream */
+ void (*bs_rm_1_s) (void *, bus_space_handle_t, bus_size_t,
+ u_int8_t *, bus_size_t);
+ void (*bs_rm_2_s) (void *, bus_space_handle_t, bus_size_t,
+ u_int16_t *, bus_size_t);
+ void (*bs_rm_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rm_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* read region stream */
+ void (*bs_rr_1_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t *, bus_size_t);
+ void (*bs_rr_2_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t *, bus_size_t);
+ void (*bs_rr_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t *, bus_size_t);
+ void (*bs_rr_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t *, bus_size_t);
+
+ /* write single stream */
+ void (*bs_w_1_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int8_t);
+ void (*bs_w_2_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int16_t);
+ void (*bs_w_4_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int32_t);
+ void (*bs_w_8_s) (void *, bus_space_handle_t,
+ bus_size_t, u_int64_t);
+
+ /* write multiple stream */
+ void (*bs_wm_1_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wm_2_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wm_4_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wm_8_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+
+ /* write region stream */
+ void (*bs_wr_1_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int8_t *, bus_size_t);
+ void (*bs_wr_2_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int16_t *, bus_size_t);
+ void (*bs_wr_4_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int32_t *, bus_size_t);
+ void (*bs_wr_8_s) (void *, bus_space_handle_t,
+ bus_size_t, const u_int64_t *, bus_size_t);
+};
+
+
+/*
+ * Utility macros; INTERNAL USE ONLY.
+ */
+#define __bs_c(a,b) __CONCAT(a,b)
+#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
+
+#define __bs_rs(sz, t, h, o)
\
+ (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
+#define __bs_ws(sz, t, h, o, v)
\
+ (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
+#define __bs_nonsingle(type, sz, t, h, o, a, c)
\
+ (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
+#define __bs_set(type, sz, t, h, o, v, c)
\
+ (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
+#define __bs_copy(sz, t, h1, o1, h2, o2, cnt)
\
+ (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
+
+#define __bs_opname_s(op,size)
__bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
+#define __bs_rs_s(sz, t, h, o)
\
+ (*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o)
+#define __bs_ws_s(sz, t, h, o, v)
\
+ (*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v)
+#define __bs_nonsingle_s(type, sz, t, h, o, a, c)
\
+ (*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c)
+
+
+/*
+ * Mapping and unmapping operations.
+ */
+#define bus_space_map(t, a, s, c, hp)
\
+ (*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
+#define bus_space_unmap(t, h, s)
\
+ (*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
+#define bus_space_subregion(t, h, o, s, hp)
\
+ (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
+
+
+/*
+ * Allocation and deallocation operations.
+ */
+#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp)
\
+ (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
+ (c), (ap), (hp))
+#define bus_space_free(t, h, s)
\
+ (*(t)->bs_free)((t)->bs_cookie, (h), (s))
+
+/*
+ * Bus barrier operations.
+ */
+#define bus_space_barrier(t, h, o, l, f)
\
+ (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
+
+
+
+/*
+ * Bus read (single) operations.
+ */
+#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
+#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
+#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
+#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
+
+#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t), (h),
(o))
+#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t), (h),
(o))
+#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t), (h),
(o))
+#define bus_space_read_stream_8(t, h, o)
__bs_rs_s(8,8,(t),(h),(o))
+
+/*
+ * Bus read multiple operations.
+ */
+#define bus_space_read_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_multi_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c))
+#define bus_space_read_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus read region operations.
+ */
+#define bus_space_read_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_read_region_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c))
+#define bus_space_read_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus write (single) operations.
+ */
+#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
+#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
+#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
+#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
+
+#define bus_space_write_stream_1(t, h, o, v)
__bs_ws_s(1,(t),(h),(o),(v))
+#define bus_space_write_stream_2(t, h, o, v)
__bs_ws_s(2,(t),(h),(o),(v))
+#define bus_space_write_stream_4(t, h, o, v)
__bs_ws_s(4,(t),(h),(o),(v))
+#define bus_space_write_stream_8(t, h, o, v)
__bs_ws_s(8,(t),(h),(o),(v))
+
+
+/*
+ * Bus write multiple operations.
+ */
+#define bus_space_write_multi_1(t, h, o, a, c)
\
+ __bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_2(t, h, o, a, c)
\
+ __bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_4(t, h, o, a, c)
\
+ __bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_8(t, h, o, a, c)
\
+ __bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_multi_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c))
+#define bus_space_write_multi_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Bus write region operations.
+ */
+#define bus_space_write_region_1(t, h, o, a, c)
\
+ __bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_2(t, h, o, a, c)
\
+ __bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_4(t, h, o, a, c)
\
+ __bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_8(t, h, o, a, c)
\
+ __bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
+
+#define bus_space_write_region_stream_1(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_2(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_4(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c))
+#define bus_space_write_region_stream_8(t, h, o, a, c)
\
+ __bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c))
+
+
+/*
+ * Set multiple operations.
+ */
+#define bus_space_set_multi_1(t, h, o, v, c)
\
+ __bs_set(sm,1,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_2(t, h, o, v, c)
\
+ __bs_set(sm,2,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_4(t, h, o, v, c)
\
+ __bs_set(sm,4,(t),(h),(o),(v),(c))
+#define bus_space_set_multi_8(t, h, o, v, c)
\
+ __bs_set(sm,8,(t),(h),(o),(v),(c))
+
+
+/*
+ * Set region operations.
+ */
+#define bus_space_set_region_1(t, h, o, v, c)
\
+ __bs_set(sr,1,(t),(h),(o),(v),(c))
+#define bus_space_set_region_2(t, h, o, v, c)
\
+ __bs_set(sr,2,(t),(h),(o),(v),(c))
+#define bus_space_set_region_4(t, h, o, v, c)
\
+ __bs_set(sr,4,(t),(h),(o),(v),(c))
+#define bus_space_set_region_8(t, h, o, v, c)
\
+ __bs_set(sr,8,(t),(h),(o),(v),(c))
+
+
+/*
+ * Copy operations.
+ */
+#define bus_space_copy_region_1(t, h1, o1, h2, o2, c)
\
+ __bs_copy(1, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_2(t, h1, o1, h2, o2, c)
\
+ __bs_copy(2, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_4(t, h1, o1, h2, o2, c)
\
+ __bs_copy(4, t, h1, o1, h2, o2, c)
+#define bus_space_copy_region_8(t, h1, o1, h2, o2, c)
\
+ __bs_copy(8, t, h1, o1, h2, o2, c)
+
+#include <machine/bus_dma.h>
+
+#endif /* _MACHINE_BUS_H_ */
diff --git a/freebsd/sys/riscv/include/machine/cpufunc.h
b/freebsd/sys/riscv/include/machine/cpufunc.h
new file mode 100644
index 00000000..0f27fc45
--- /dev/null
+++ b/freebsd/sys/riscv/include/machine/cpufunc.h
@@ -0,0 +1,135 @@
+/*-
+ * Copyright (c) 2015-2016 Ruslan Bukin <b...@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_CPUFUNC_H_
+#define _MACHINE_CPUFUNC_H_
+
+static __inline void
+breakpoint(void)
+{
+
+ __asm("ebreak");
+}
+
+#ifdef _KERNEL
+
+#include <machine/riscvreg.h>
+
+static __inline register_t
+intr_disable(void)
+{
+ uint64_t ret;
+
+ __asm __volatile(
+ "csrrci %0, sstatus, %1"
+ : "=&r" (ret) : "i" (SSTATUS_SIE)
+ );
+
+ return (ret & (SSTATUS_SIE));
+}
+
+static __inline void
+intr_restore(register_t s)
+{
+
+ __asm __volatile(
+ "csrs sstatus, %0"
+ :: "r" (s)
+ );
+}
+
+static __inline void
+intr_enable(void)
+{
+
+ __asm __volatile(
+ "csrsi sstatus, %0"
+ :: "i" (SSTATUS_SIE)
+ );
+}
+
+/* NB: fence() is defined as a macro in <machine/atomic.h>. */
+
+static __inline void
+fence_i(void)
+{
+
+ __asm __volatile("fence.i" ::: "memory");
+}
+
+static __inline void
+sfence_vma(void)
+{
+
+ __asm __volatile("sfence.vma" ::: "memory");
+}
+
+static __inline void
+sfence_vma_page(uintptr_t addr)
+{
+
+ __asm __volatile("sfence.vma %0" :: "r" (addr) : "memory");
+}
+
+#define rdcycle() csr_read64(cycle)
+#define rdtime() csr_read64(time)
+#define rdinstret() csr_read64(instret)
+#define rdhpmcounter(n) csr_read64(hpmcounter##n)
+
+extern int64_t dcache_line_size;
+extern int64_t icache_line_size;
+
+#define cpu_dcache_wbinv_range(a, s)
+#define cpu_dcache_inv_range(a, s)
+#define cpu_dcache_wb_range(a, s)
+
+#define cpu_idcache_wbinv_range(a, s)
+#define cpu_icache_sync_range(a, s)
+#define cpu_icache_sync_range_checked(a, s)
+
+static __inline void
+load_satp(uint64_t val)
+{
+
+ __asm __volatile("csrw satp, %0" :: "r"(val));
+}
+
+#define cpufunc_nullop() riscv_nullop()
+
+void riscv_nullop(void);
+
+#endif /* _KERNEL */
+#endif /* _MACHINE_CPUFUNC_H_ */
diff --git a/freebsd/sys/riscv/include/machine/riscvreg.h
b/freebsd/sys/riscv/include/machine/riscvreg.h
new file mode 100644
index 00000000..ab99ed8a
--- /dev/null
+++ b/freebsd/sys/riscv/include/machine/riscvreg.h
@@ -0,0 +1,246 @@
+/*-
+ * Copyright (c) 2015-2017 Ruslan Bukin <b...@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_RISCVREG_H_
+#define _MACHINE_RISCVREG_H_
+
+#define EXCP_SHIFT 0
+#define EXCP_MASK (0xf << EXCP_SHIFT)
+#define EXCP_MISALIGNED_FETCH 0
+#define EXCP_FAULT_FETCH 1
+#define EXCP_ILLEGAL_INSTRUCTION 2
+#define EXCP_BREAKPOINT 3
+#define EXCP_MISALIGNED_LOAD 4
+#define EXCP_FAULT_LOAD 5
+#define EXCP_MISALIGNED_STORE 6
+#define EXCP_FAULT_STORE 7
+#define EXCP_USER_ECALL 8
+#define EXCP_SUPERVISOR_ECALL 9
+#define EXCP_HYPERVISOR_ECALL 10
+#define EXCP_MACHINE_ECALL 11
+#define EXCP_INST_PAGE_FAULT 12
+#define EXCP_LOAD_PAGE_FAULT 13
+#define EXCP_STORE_PAGE_FAULT 15
+#define EXCP_INTR (1ul << 63)
+
+#define SSTATUS_UIE (1 << 0)
+#define SSTATUS_SIE (1 << 1)
+#define SSTATUS_UPIE (1 << 4)
+#define SSTATUS_SPIE (1 << 5)
+#define SSTATUS_SPIE_SHIFT 5
+#define SSTATUS_SPP (1 << 8)
+#define SSTATUS_SPP_SHIFT 8
+#define SSTATUS_FS_SHIFT 13
+#define SSTATUS_FS_OFF (0x0 << SSTATUS_FS_SHIFT)
+#define SSTATUS_FS_INITIAL (0x1 << SSTATUS_FS_SHIFT)
+#define SSTATUS_FS_CLEAN (0x2 << SSTATUS_FS_SHIFT)
+#define SSTATUS_FS_DIRTY (0x3 << SSTATUS_FS_SHIFT)
+#define SSTATUS_FS_MASK (0x3 << SSTATUS_FS_SHIFT)
+#define SSTATUS_XS_SHIFT 15
+#define SSTATUS_XS_MASK (0x3 << SSTATUS_XS_SHIFT)
+#define SSTATUS_SUM (1 << 18)
+#define SSTATUS32_SD (1 << 63)
+#define SSTATUS64_SD (1 << 31)
+
+#define MSTATUS_UIE (1 << 0)
+#define MSTATUS_SIE (1 << 1)
+#define MSTATUS_HIE (1 << 2)
+#define MSTATUS_MIE (1 << 3)
+#define MSTATUS_UPIE (1 << 4)
+#define MSTATUS_SPIE (1 << 5)
+#define MSTATUS_SPIE_SHIFT 5
+#define MSTATUS_HPIE (1 << 6)
+#define MSTATUS_MPIE (1 << 7)
+#define MSTATUS_MPIE_SHIFT 7
+#define MSTATUS_SPP (1 << 8)
+#define MSTATUS_SPP_SHIFT 8
+#define MSTATUS_HPP_MASK 0x3
+#define MSTATUS_HPP_SHIFT 9
+#define MSTATUS_MPP_MASK 0x3
+#define MSTATUS_MPP_SHIFT 11
+#define MSTATUS_FS_MASK 0x3
+#define MSTATUS_FS_SHIFT 13
+#define MSTATUS_XS_MASK 0x3
+#define MSTATUS_XS_SHIFT 15
+#define MSTATUS_MPRV (1 << 17)
+#define MSTATUS_PUM (1 << 18)
+#define MSTATUS_VM_MASK 0x1f
+#define MSTATUS_VM_SHIFT 24
+#define MSTATUS_VM_MBARE 0
+#define MSTATUS_VM_MBB 1
+#define MSTATUS_VM_MBBID 2
+#define MSTATUS_VM_SV32 8
+#define MSTATUS_VM_SV39 9
+#define MSTATUS_VM_SV48 10
+#define MSTATUS_VM_SV57 11
+#define MSTATUS_VM_SV64 12
+#define MSTATUS32_SD (1 << 63)
+#define MSTATUS64_SD (1 << 31)
+
+#define MSTATUS_PRV_U 0 /* user */
+#define MSTATUS_PRV_S 1 /* supervisor */
+#define MSTATUS_PRV_H 2 /* hypervisor */
+#define MSTATUS_PRV_M 3 /* machine */
+
+#define MIE_USIE (1 << 0)
+#define MIE_SSIE (1 << 1)
+#define MIE_HSIE (1 << 2)
+#define MIE_MSIE (1 << 3)
+#define MIE_UTIE (1 << 4)
+#define MIE_STIE (1 << 5)
+#define MIE_HTIE (1 << 6)
+#define MIE_MTIE (1 << 7)
+
+#define MIP_USIP (1 << 0)
+#define MIP_SSIP (1 << 1)
+#define MIP_HSIP (1 << 2)
+#define MIP_MSIP (1 << 3)
+#define MIP_UTIP (1 << 4)
+#define MIP_STIP (1 << 5)
+#define MIP_HTIP (1 << 6)
+#define MIP_MTIP (1 << 7)
+
+#define SIE_USIE (1 << 0)
+#define SIE_SSIE (1 << 1)
+#define SIE_UTIE (1 << 4)
+#define SIE_STIE (1 << 5)
+#define SIE_UEIE (1 << 8)
+#define SIE_SEIE (1 << 9)
+
+#define MIP_SEIP (1 << 9)
+
+/* Note: sip register has no SIP_STIP bit in Spike simulator */
+#define SIP_SSIP (1 << 1)
+#define SIP_STIP (1 << 5)
+
+#define SATP_PPN_S 0
+#define SATP_PPN_M (0xfffffffffff << SATP_PPN_S)
+#define SATP_ASID_S 44
+#define SATP_ASID_M (0xffff << SATP_ASID_S)
+#define SATP_MODE_S 60
+#define SATP_MODE_M (0xf << SATP_MODE_S)
+#define SATP_MODE_SV39 (8ULL << SATP_MODE_S)
+#define SATP_MODE_SV48 (9ULL << SATP_MODE_S)
+
+#define XLEN __riscv_xlen
+#define XLEN_BYTES (XLEN / 8)
+#define INSN_SIZE 4
+#define INSN_C_SIZE 2
+
+#define X_RA 1
+#define X_SP 2
+#define X_GP 3
+#define X_TP 4
+#define X_T0 5
+#define X_T1 6
+#define X_T2 7
+#define X_T3 28
+
+#define RD_SHIFT 7
+#define RD_MASK (0x1f << RD_SHIFT)
+#define RS1_SHIFT 15
+#define RS1_MASK (0x1f << RS1_SHIFT)
+#define RS1_SP (X_SP << RS1_SHIFT)
+#define RS2_SHIFT 20
+#define RS2_MASK (0x1f << RS2_SHIFT)
+#define RS2_RA (X_RA << RS2_SHIFT)
+#define IMM_SHIFT 20
+#define IMM_MASK (0xfff << IMM_SHIFT)
+
+#define RS2_C_SHIFT 2
+#define RS2_C_MASK (0x1f << RS2_C_SHIFT)
+#define RS2_C_RA (X_RA << RS2_C_SHIFT)
+
+#define CSR_ZIMM(val)
\
+ (__builtin_constant_p(val) && ((u_long)(val) < 32))
+
+#define csr_swap(csr, val)
\
+({ if (CSR_ZIMM(val)) \
+ __asm __volatile("csrrwi %0, " #csr ", %1" \
+ : "=r" (val) : "i" (val)); \
+ else \
+ __asm __volatile("csrrw %0, " #csr ", %1" \
+ : "=r" (val) : "r" (val)); \
+ val; \
+})
+
+#define csr_write(csr, val)
\
+({ if (CSR_ZIMM(val)) \
+ __asm __volatile("csrwi " #csr ", %0" :: "i" (val)); \
+ else \
+ __asm __volatile("csrw " #csr ", %0" :: "r" (val)); \
+})
+
+#define csr_set(csr, val)
\
+({ if (CSR_ZIMM(val)) \
+ __asm __volatile("csrsi " #csr ", %0" :: "i" (val)); \
+ else \
+ __asm __volatile("csrs " #csr ", %0" :: "r" (val)); \
+})
+
+#define csr_clear(csr, val)
\
+({ if (CSR_ZIMM(val)) \
+ __asm __volatile("csrci " #csr ", %0" :: "i" (val)); \
+ else \
+ __asm __volatile("csrc " #csr ", %0" :: "r" (val)); \
+})
+
+#define csr_read(csr)
\
+({ u_long val; \
+ __asm __volatile("csrr %0, " #csr : "=r" (val)); \
+ val; \
+})
+
+#if __riscv_xlen == 32
+#define csr_read64(csr)
\
+({ uint64_t val; \
+ uint32_t high, low; \
+ __asm __volatile("1: " \
+ "csrr t0, " #csr "h\n" \
+ "csrr %0, " #csr "\n" \
+ "csrr %1, " #csr "h\n" \
+ "bne t0, %1, 1b" \
+ : "=r" (low), "=r" (high) \
+ : \
+ : "t0"); \
+ val = (low | ((uint64_t)high << 32)); \
+ val; \
+})
+#else
+#define csr_read64(csr) ((uint64_t)csr_read(csr))
+#endif
+
+#endif /* !_MACHINE_RISCVREG_H_ */
diff --git a/rtemsbsd/include/machine/_bus.h
b/freebsd/sys/sparc/include/machine/_bus.h
similarity index 100%
rename from rtemsbsd/include/machine/_bus.h
rename to freebsd/sys/sparc/include/machine/_bus.h
diff --git a/rtemsbsd/include/machine/bus.h
b/freebsd/sys/sparc/include/machine/bus.h
similarity index 100%
rename from rtemsbsd/include/machine/bus.h
rename to freebsd/sys/sparc/include/machine/bus.h
diff --git a/freebsd/sys/sparc/include/machine/cpufunc.h
b/freebsd/sys/sparc/include/machine/cpufunc.h
new file mode 100644
index 00000000..e69de29b
diff --git a/freebsd/sys/sparc64/include/machine/_bus.h
b/freebsd/sys/sparc64/include/machine/_bus.h
new file mode 100644
index 00000000..55496461
--- /dev/null
+++ b/freebsd/sys/sparc64/include/machine/_bus.h
@@ -0,0 +1,41 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2005 M. Warner Losh.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions, and the following disclaimer,
+ * without modification, immediately at the beginning of the file.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef SPARC64_INCLUDE__BUS_H
+#define SPARC64_INCLUDE__BUS_H
+
+typedef u_long bus_addr_t;
+typedef u_long bus_size_t;
+typedef u_long bus_space_handle_t;
+typedef struct bus_space_tag *bus_space_tag_t;
+
+#endif /* SPARC64_INCLUDE__BUS_H */
diff --git a/freebsd/sys/sparc64/include/machine/bus.h
b/freebsd/sys/sparc64/include/machine/bus.h
new file mode 100644
index 00000000..e36c6863
--- /dev/null
+++ b/freebsd/sys/sparc64/include/machine/bus.h
@@ -0,0 +1,852 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-4-Clause
+ *
+ * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 1997-1999 Eduardo E. Horvath. All rights reserved.
+ * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * from: NetBSD: bus.h,v 1.58 2008/04/28 20:23:36 martin Exp
+ * and
+ * from: FreeBSD: src/sys/alpha/include/bus.h,v 1.9 2001/01/09
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _MACHINE_BUS_H_
+#define _MACHINE_BUS_H_
+
+#ifdef BUS_SPACE_DEBUG
+#include <sys/ktr.h>
+#endif
+
+#include <machine/_bus.h>
+#include <machine/cpufunc.h>
+
+/*
+ * Nexus and SBus spaces are non-cached and big endian
+ * (except for RAM and PROM)
+ *
+ * PCI spaces are non-cached and little endian
+ */
+#define NEXUS_BUS_SPACE 0
+#define SBUS_BUS_SPACE 1
+#define PCI_CONFIG_BUS_SPACE 2
+#define PCI_IO_BUS_SPACE 3
+#define PCI_MEMORY_BUS_SPACE 4
+#define LAST_BUS_SPACE 5
+
+extern const int bus_type_asi[];
+extern const int bus_stream_asi[];
+
+#define __BUS_SPACE_HAS_STREAM_METHODS 1
+
+#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
+#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
+#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFF
+#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
+#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
+#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFF
+
+#define BUS_SPACE_UNRESTRICTED (~0)
+
+struct bus_space_tag {
+ void *bst_cookie;
+ int bst_type;
+};
+
+/*
+ * Bus space function prototypes.
+ */
+static void bus_space_barrier(bus_space_tag_t, bus_space_handle_t, bus_size_t,
+ bus_size_t, int);
+static int bus_space_subregion(bus_space_tag_t, bus_space_handle_t,
+ bus_size_t, bus_size_t, bus_space_handle_t *);
+
+/*
+ * Map a region of device bus space into CPU virtual address space.
+ */
+int bus_space_map(bus_space_tag_t tag, bus_addr_t address, bus_size_t size,
+ int flags, bus_space_handle_t *handlep);
+
+/*
+ * Unmap a region of device bus space.
+ */
+void bus_space_unmap(bus_space_tag_t tag, bus_space_handle_t handle,
+ bus_size_t size);
+
+static __inline void
+bus_space_barrier(bus_space_tag_t t __unused, bus_space_handle_t h __unused,
+ bus_size_t o __unused, bus_size_t s __unused, int f __unused)
+{
+
+ /*
+ * We have lots of alternatives depending on whether we're
+ * synchronizing loads with loads, loads with stores, stores
+ * with loads, or stores with stores. The only ones that seem
+ * generic are #Sync and #MemIssue. We use #Sync for safety.
+ */
+ membar(Sync);
+}
+
+static __inline int
+bus_space_subregion(bus_space_tag_t t __unused, bus_space_handle_t h,
+ bus_size_t o __unused, bus_size_t s __unused, bus_space_handle_t *hp)
+{
+
+ *hp = h + o;
+ return (0);
+}
+
+/* flags for bus space map functions */
+#define BUS_SPACE_MAP_CACHEABLE 0x0001
+#define BUS_SPACE_MAP_LINEAR 0x0002
+#define BUS_SPACE_MAP_READONLY 0x0004
+#define BUS_SPACE_MAP_PREFETCHABLE 0x0008
+/* placeholders for bus functions... */
+#define BUS_SPACE_MAP_BUS1 0x0100
+#define BUS_SPACE_MAP_BUS2 0x0200
+#define BUS_SPACE_MAP_BUS3 0x0400
+#define BUS_SPACE_MAP_BUS4 0x0800
+
+/* flags for bus_space_barrier() */
+#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
+#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier
*/
+
+#ifdef BUS_SPACE_DEBUG
+#define KTR_BUS KTR_SPARE2
+#define __BUS_DEBUG_ACCESS(h, o, desc, sz) do {
\
+ CTR4(KTR_BUS, "bus space: %s %d: handle %#lx, offset %#lx", \
+ (desc), (sz), (h), (o)); \
+} while (0)
+#else
+#define __BUS_DEBUG_ACCESS(h, o, desc, sz)
+#endif
+
+static __inline uint8_t
+bus_space_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read", 1);
+ return (lduba_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
+}
+
+static __inline uint16_t
+bus_space_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read", 2);
+ return (lduha_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
+}
+
+static __inline uint32_t
+bus_space_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read", 4);
+ return (lduwa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
+}
+
+static __inline uint64_t
+bus_space_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read", 8);
+ return (ldxa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type]));
+}
+
+static __inline void
+bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint8_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_1(t, h, o);
+}
+
+static __inline void
+bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint16_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_2(t, h, o);
+}
+
+static __inline void
+bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint32_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_4(t, h, o);
+}
+
+static __inline void
+bus_space_read_multi_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint64_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_8(t, h, o);
+}
+
+static __inline void
+bus_space_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint8_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write", 1);
+ stba_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint16_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write", 2);
+ stha_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint32_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write", 4);
+ stwa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint64_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write", 8);
+ stxa_nc((caddr_t)(h + o), bus_type_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint8_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_1(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint16_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_2(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint32_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_4(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_write_multi_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint64_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_8(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_set_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint8_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_1(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint16_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_2(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint32_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_4(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_multi_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint64_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_8(t, h, o, v);
+}
+
+static __inline void
+bus_space_read_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint8_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o++)
+ *a = bus_space_read_1(t, h, o);
+}
+
+static __inline void
+bus_space_read_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint16_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 2)
+ *a = bus_space_read_2(t, h, o);
+}
+
+static __inline void
+bus_space_read_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint32_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 4)
+ *a = bus_space_read_4(t, h, o);
+}
+
+static __inline void
+bus_space_read_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint64_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 8)
+ *a = bus_space_read_8(t, h, o);
+}
+
+static __inline void
+bus_space_write_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint8_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o++)
+ bus_space_write_1(t, h, o, *a);
+}
+
+static __inline void
+bus_space_write_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint16_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 2)
+ bus_space_write_2(t, h, o, *a);
+}
+
+static __inline void
+bus_space_write_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint32_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 4)
+ bus_space_write_4(t, h, o, *a);
+}
+
+static __inline void
+bus_space_write_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint64_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 8)
+ bus_space_write_8(t, h, o, *a);
+}
+
+static __inline void
+bus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint8_t v, bus_size_t c)
+{
+
+ for (; c; c--, o++)
+ bus_space_write_1(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint16_t v, bus_size_t c)
+{
+
+ for (; c; c--, o += 2)
+ bus_space_write_2(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint32_t v, bus_size_t c)
+{
+
+ for (; c; c--, o += 4)
+ bus_space_write_4(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_region_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ const uint64_t v, bus_size_t c)
+{
+
+ for (; c; c--, o += 8)
+ bus_space_write_8(t, h, o, v);
+}
+
+static __inline void
+bus_space_copy_region_1(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1++, o2++)
+ bus_space_write_1(t, h1, o1, bus_space_read_1(t, h2, o2));
+}
+
+static __inline void
+bus_space_copy_region_2(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1 += 2, o2 += 2)
+ bus_space_write_2(t, h1, o1, bus_space_read_2(t, h2, o2));
+}
+
+static __inline void
+bus_space_copy_region_4(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1 += 4, o2 += 4)
+ bus_space_write_4(t, h1, o1, bus_space_read_4(t, h2, o2));
+}
+
+static __inline void
+bus_space_copy_region_8(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1 += 8, o2 += 8)
+ bus_space_write_8(t, h1, o1, bus_space_read_8(t, h2, o2));
+}
+
+static __inline uint8_t
+bus_space_read_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read stream", 1);
+ return (lduba_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
+}
+
+static __inline uint16_t
+bus_space_read_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read stream", 2);
+ return (lduha_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
+}
+
+static __inline uint32_t
+bus_space_read_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read stream", 4);
+ return (lduwa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
+}
+
+static __inline uint64_t
+bus_space_read_stream_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "read stream", 8);
+ return (ldxa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type]));
+}
+
+static __inline void
+bus_space_read_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint8_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_stream_1(t, h, o);
+}
+
+static __inline void
+bus_space_read_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint16_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_stream_2(t, h, o);
+}
+
+static __inline void
+bus_space_read_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint32_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_stream_4(t, h, o);
+}
+
+static __inline void
+bus_space_read_multi_stream_8(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint64_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ *a++ = bus_space_read_stream_8(t, h, o);
+}
+
+static __inline void
+bus_space_write_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint8_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write stream", 1);
+ stba_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint16_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write stream", 2);
+ stha_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint32_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write stream", 4);
+ stwa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_stream_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint64_t v)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "write stream", 8);
+ stxa_nc((caddr_t)(h + o), bus_stream_asi[t->bst_type], v);
+}
+
+static __inline void
+bus_space_write_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint8_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_1(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_write_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint16_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_2(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_write_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint32_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_4(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_write_multi_stream_8(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint64_t *a, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_8(t, h, o, *a++);
+}
+
+static __inline void
+bus_space_set_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint8_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_1(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint16_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_2(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint32_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_4(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_multi_stream_8(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint64_t v, size_t c)
+{
+
+ while (c-- > 0)
+ bus_space_write_stream_8(t, h, o, v);
+}
+
+static __inline void
+bus_space_read_region_stream_1(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint8_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o++)
+ *a = bus_space_read_stream_1(t, h, o);
+}
+
+static __inline void
+bus_space_read_region_stream_2(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint16_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 2)
+ *a = bus_space_read_stream_2(t, h, o);
+}
+
+static __inline void
+bus_space_read_region_stream_4(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint32_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 4)
+ *a = bus_space_read_stream_4(t, h, o);
+}
+
+static __inline void
+bus_space_read_region_stream_8(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, uint64_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 8)
+ *a = bus_space_read_stream_8(t, h, o);
+}
+
+static __inline void
+bus_space_write_region_stream_1(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint8_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o++)
+ bus_space_write_stream_1(t, h, o, *a);
+}
+
+static __inline void
+bus_space_write_region_stream_2(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint16_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 2)
+ bus_space_write_stream_2(t, h, o, *a);
+}
+
+static __inline void
+bus_space_write_region_stream_4(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint32_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 4)
+ bus_space_write_stream_4(t, h, o, *a);
+}
+
+static __inline void
+bus_space_write_region_stream_8(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint64_t *a, bus_size_t c)
+{
+
+ for (; c; a++, c--, o += 8)
+ bus_space_write_stream_8(t, h, o, *a);
+}
+
+static __inline void
+bus_space_set_region_stream_1(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint8_t v, bus_size_t c)
+{
+
+ for (; c; c--, o++)
+ bus_space_write_stream_1(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_region_stream_2(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint16_t v, bus_size_t c)
+{
+
+ for (; c; c--, o += 2)
+ bus_space_write_stream_2(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_region_stream_4(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint32_t v, bus_size_t c)
+{
+
+ for (; c; c--, o += 4)
+ bus_space_write_stream_4(t, h, o, v);
+}
+
+static __inline void
+bus_space_set_region_stream_8(bus_space_tag_t t, bus_space_handle_t h,
+ bus_size_t o, const uint64_t v, bus_size_t c)
+{
+
+ for (; c; c--, o += 8)
+ bus_space_write_stream_8(t, h, o, v);
+}
+
+static __inline void
+bus_space_copy_region_stream_1(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1++, o2++)
+ bus_space_write_stream_1(t, h1, o1, bus_space_read_stream_1(t, h2,
+ o2));
+}
+
+static __inline void
+bus_space_copy_region_stream_2(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1 += 2, o2 += 2)
+ bus_space_write_stream_2(t, h1, o1, bus_space_read_stream_2(t, h2,
+ o2));
+}
+
+static __inline void
+bus_space_copy_region_stream_4(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1 += 4, o2 += 4)
+ bus_space_write_stream_4(t, h1, o1, bus_space_read_stream_4(t, h2,
+ o2));
+}
+
+static __inline void
+bus_space_copy_region_stream_8(bus_space_tag_t t, bus_space_handle_t h1,
+ bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+
+ for (; c; c--, o1 += 8, o2 += 8)
+ bus_space_write_stream_8(t, h1, o1, bus_space_read_8(t, h2, o2));
+}
+
+static __inline int
+bus_space_peek_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint8_t *a)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "peek", 1);
+ return (fasword8(bus_type_asi[t->bst_type], (caddr_t)(h + o), a));
+}
+
+static __inline int
+bus_space_peek_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint16_t *a)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "peek", 2);
+ return (fasword16(bus_type_asi[t->bst_type], (caddr_t)(h + o), a));
+}
+
+static __inline int
+bus_space_peek_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
+ uint32_t *a)
+{
+
+ __BUS_DEBUG_ACCESS(h, o, "peek", 4);
+ return (fasword32(bus_type_asi[t->bst_type], (caddr_t)(h + o), a));
+}
+
+#include <machine/bus_dma.h>
+
+#endif /* !_MACHINE_BUS_H_ */
diff --git a/rtemsbsd/include/machine/cpufunc.h
b/rtemsbsd/include/machine/cpufunc.h
deleted file mode 100644
index fa882cb5..00000000
--- a/rtemsbsd/include/machine/cpufunc.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty file */
--
2.17.1
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