seems ok to me
On Fri, Feb 24, 2023 at 3:27 PM Kinsey Moore <kinsey.mo...@oarcorp.com> wrote:
>
> Interrupts must be disabled during MMU remapping since the majority of
> RTEMS including interrupts expects normal memory mapping semantics such
> as unaligned accesses.
> ---
> bsps/aarch64/shared/mmu/vmsav8-64.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/bsps/aarch64/shared/mmu/vmsav8-64.c
> b/bsps/aarch64/shared/mmu/vmsav8-64.c
> index 190a05f7d5..270b9319ad 100644
> --- a/bsps/aarch64/shared/mmu/vmsav8-64.c
> +++ b/bsps/aarch64/shared/mmu/vmsav8-64.c
> @@ -47,12 +47,16 @@ rtems_status_code aarch64_mmu_map(
> )
> {
> rtems_status_code sc;
> + ISR_Level level;
> uint64_t max_mappable = 1LLU << aarch64_mmu_get_cpu_pa_bits();
>
> if ( addr >= max_mappable || (addr + size) > max_mappable ) {
> return RTEMS_INVALID_ADDRESS;
> }
>
> + /* Disable interrupts so they don't run while the MMU is disabled */
> + _ISR_Local_disable( level );
> +
> aarch64_mmu_disable();
> sc = aarch64_mmu_map_block(
> (uint64_t *) bsp_translation_table_base,
> @@ -70,5 +74,7 @@ rtems_status_code aarch64_mmu_map(
> _AARCH64_Instruction_synchronization_barrier();
> aarch64_mmu_enable();
>
> + _ISR_Local_enable( level );
> +
> return sc;
> }
> --
> 2.30.2
>
> _______________________________________________
> devel mailing list
> devel@rtems.org
> http://lists.rtems.org/mailman/listinfo/devel
_______________________________________________
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
