The MMU must be enabled during mapping changes and TLB invalidations.
When this is not the case, TLB updates do not occur correctly in all
cases. This is especially apparent when changing a block entry to a
table entry when remapping small memory ranges in an otherwise
contiguous block.
---
bsps/aarch64/shared/mmu/vmsav8-64.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/bsps/aarch64/shared/mmu/vmsav8-64.c
b/bsps/aarch64/shared/mmu/vmsav8-64.c
index 270b9319ad..c426dec900 100644
--- a/bsps/aarch64/shared/mmu/vmsav8-64.c
+++ b/bsps/aarch64/shared/mmu/vmsav8-64.c
@@ -54,10 +54,12 @@ rtems_status_code aarch64_mmu_map(
return RTEMS_INVALID_ADDRESS;
}
- /* Disable interrupts so they don't run while the MMU is disabled */
+ /*
+ * Disable interrupts so they don't run while the MMU tables are being
+ * modified.
+ */
_ISR_Local_disable( level );
- aarch64_mmu_disable();
sc = aarch64_mmu_map_block(
(uint64_t *) bsp_translation_table_base,
0x0,
@@ -72,7 +74,6 @@ rtems_status_code aarch64_mmu_map(
);
_AARCH64_Data_synchronization_barrier();
_AARCH64_Instruction_synchronization_barrier();
- aarch64_mmu_enable();
_ISR_Local_enable( level );
--
2.30.2
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