Dear RTEMS developers,
Here is a follow-up patch to our previous work on the Zynq US+ RPU BSP.
In fact, we had fixed this issue a few months ago but didn't find a good time
to upstream it since then.
P.S. It is great to see that the migration to GitLab is happening.
Thanks,
Stanislav
---
Author: Stanislav Pankevich <stanis...@reflexaerospace.com>
Date: Tue Mar 19 10:34:57 2024 +0100
bsps: xilinx-zynqmp-rpu: fix the integer truncation in Triple Timer Counter
clock driver
We observed a strange behavior of the 1Hz timer when running cFS on Zynq
RPU. After some investigation, we reduced the error to the truncation issue.
This patch fixes the issue.
diff --git a/bsps/shared/dev/clock/xil-ttc.c b/bsps/shared/dev/clock/xil-ttc.c
index 2c47684045..5121773a6f 100644
--- a/bsps/shared/dev/clock/xil-ttc.c
+++ b/bsps/shared/dev/clock/xil-ttc.c
@@ -126,7 +126,7 @@ static void
zynqmp_ttc_clock_driver_support_initialize_hardware(void)
/* Setup match register to generate tick IRQ */
ttc_clock_instance.irq_match_interval =
- (uint32_t) ((frequency * microsec_per_tick) / 1000000);
+ (uint32_t) (((uint64_t)frequency * microsec_per_tick) / 1000000);
XTtcPs_WriteReg(BSP_SELECTED_TTC_ADDR, XTTCPS_MATCH_0_OFFSET,
ttc_clock_instance.irq_match_interval);
/* Clear interupts (clear on read) */
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