On 13 Aug 2003, John Dennis wrote: > These are issues that go beyond cached vs. uncached memory but can cause > symptoms that are similar. Some of the issues may be due to PCI bridges, > but I personally do not feel I understand PCI bridge issues well enough > to make assertions. (For example bridges have complex rules on queuing > transactions, delays, retrys, etc. If a bridge transaction timeouts, as > I think is the case with VGA data which seems to be slower, then a > bridge is susposed to return all ones which is what I was seeing, but I > think this is only for PCI configuration cycles, not regular memory > cycles, and here is a good example of where my understanding starts to > break down :-(
No. In XFree86 4.3 at least, you will _always_ get all ones on master aborts, whether the cycles be for configuration, I/O or memory. The alternative isn't pretty: master aborts would kill the system with no OS recourse, i.e. the so-called (and braindead) hard-fail behaviour. How many bridges are between the CPU and the nVidia? And by "bridges" I mean PCI-to-PCI bridges, not host bridges. If none, or only AGP (as I suspect is the case here), the only explanation I see is that the nVidia somehow schedules VGA accesses at a lower priority, something I find hard to believe. I'd check if increasing PCI timeouts along the path to the nVidia makes any difference. BTW, I/O port 0x80, on ix86, is the BIOS POST port, and I don't think SlowBCopy() should continue to assume 0x80 remains free for that purpose for very much longer, even on ix86, let alone other archs. Marc. +----------------------------------+-----------------------------------+ | Marc Aurele La France | work: 1-780-492-9310 | | Computing and Network Services | fax: 1-780-492-1729 | | 352 General Services Building | email: [EMAIL PROTECTED] | | University of Alberta +-----------------------------------+ | Edmonton, Alberta | | | T6G 2H1 | Standard disclaimers apply | | CANADA | | +----------------------------------+-----------------------------------+ XFree86 Core Team member. ATI driver and X server internals. _______________________________________________ Devel mailing list [EMAIL PROTECTED] http://XFree86.Org/mailman/listinfo/devel
