Not sure if this helps at all, but there is mentioned something
about the enabling of the secondary video device on I830M
chipset. The datasheet is available at following address:
ftp://download.intel.com/design/chipsets/datashts/29833803.pdf
On the page 81, this is said about the GCC1-GMCH Control Register #1
Device #0:
Address Offset 52-53h,
bit 3: Device #2 Disable - When set to "1" this bit disables
Device #2 and all associated spaces (Default value = 0)
bit 2: Device #2 Function 1 Enable - When set to "1", enables the
second function within Device #2 (Default Value = 0).
It is said that these "I/O mapped registers reside in the CPU I/O
addres space - the configuration address (CONFIG_ADDRESS) and the
configuration data (CONFIG_DATA) register. The configuration address
register enables/disables the configuration space and determines what
portion of configuration space is visible through the configuration
data window."
There's also information about the CONFIG_ADDRESS and usage of it,
starting at page 65. But I guess there's no reason for me to copy
it all here, as it is available in the mentioned url... :-)
Well, I haven't ever programmed any hardware-related stuff, and
all I can do is hope this information might be for some use..
_______________________________________________
Devel mailing list
[EMAIL PROTECTED]
http://XFree86.Org/mailman/listinfo/devel
