On Mon, 1 Aug 2011 21:25:36 +0100 Jamie Iles <ja...@jamieiles.com> wrote:
> On Mon, Aug 01, 2011 at 03:12:09PM -0500, Scott Wood wrote: > > It looks like the code uses a little-endian accessor (readw) in a couple > > places. The instance in gpio_nand_readbuf16() should never be reached > > since the NAND layer should never do an unaligned buffer read, but the one > > in gpio_nand_verifybuf16() could cause problems. [snip] > > OK, so for this should I just document that all accesses are > little-endian? We can then add properties later if we need something > different. Right now, the driver is using a mix of native and little endian accesses. That's not something the binding can fix. :-) Native endian is what it should be. > > Or perhaps the io sync address should just be a physical address, not a reg > > that gets translated. > > OK, I like the sound of that. I'm a bit new to the world of device tree > so I'm not sure of the best way to do this. Would reading the > #address-cells property then use of_read_number() be the right way? I'd just unconditionally define it as a 64-bit physical address. -Scott _______________________________________________ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss