Hi Olof, On Mon, Apr 2, 2012 at 10:22 PM, Olof Johansson <o...@lixom.net> wrote: > On Mon, Apr 2, 2012 at 4:19 PM, Simon Glass <s...@chromium.org> wrote: >> This adds timings for T20 and T25 Seaboards, using the bindings found here: >> >> http://patchwork.ozlabs.org/patch/132928/ >> >> We supply both full speed options for normal running, and half speed options >> for testing / development. >> >> Signed-off-by: Simon Glass <s...@chromium.org> > > This seems incorrect to me. You provide both T20 and T25 EMC tables in > the same device tree with no way to determine which one to use. > > Unfortunately nvidia didn't use the boot straps to tell if they were > on a t20 or t25 seaboard, so you'll just have to know. At the kernel > side we chose to just ditch T20 since most boards still in use are > T25.
The selection of memory speed is down to the board. There is a later patch in this series (just cc'd to you) which looks at the SOC ID to determine whether it is T20 or T25, and selects the speed accordingly. This speed is used to look up the correct table in the device tree > > > > -Olof Regards, Simon _______________________________________________ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss
