On Wed, Dec 19, 2012 at 9:18 PM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote:
> The Allwinner SoCs have an IP module that handle both the muxing and the > GPIOs. Sorry for very slow review :-( :-( > include/linux/pinctrl/pinconf-generic.h | 1 + Can you break this into a separate patch and rebase it? It does not apply anymore after v3.8... > diff --git a/include/linux/pinctrl/pinconf-generic.h > b/include/linux/pinctrl/pinconf-generic.h > index 4f0abb9..5f5968d 100644 > --- a/include/linux/pinctrl/pinconf-generic.h > +++ b/include/linux/pinctrl/pinconf-generic.h > @@ -74,6 +74,7 @@ enum pin_config_param { > PIN_CONFIG_DRIVE_PUSH_PULL, > PIN_CONFIG_DRIVE_OPEN_DRAIN, > PIN_CONFIG_DRIVE_OPEN_SOURCE, > + PIN_CONFIG_DRIVE_CURRENT, > PIN_CONFIG_INPUT_SCHMITT, > PIN_CONFIG_INPUT_DEBOUNCE, > PIN_CONFIG_POWER_SOURCE, Above the definitions there is some kerneldoc and that is where this has to be defined. You also have to defines what the argument to this parameter is. I think it should be renamed PIN_CONFIG_DRIVE_STRENGTH and the argument should be the number of drivers stages. These things are constructed with totem-pole-like outputs and the number of totempoles define the drive strength, usually it will be something like 1 = 2mA 2 = 4mA 3 = 6mA 4 = 8mA or similar, as you see 2 mA for each added driver stage. The driver can convert to any internal representation... Yours, Linus Walleij _______________________________________________ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss