On 01/12/2013 08:54 AM, Rob Herring wrote: > On 01/10/2013 07:47 AM, Michal Simek wrote: >> Hi Rob, Mark, Grant and others, >> >> I want to check with you the location of ARM pmu node >> I see that >> 1) highbank and dbx5x0 have it in soc node >> >> 2) vexpress and tegra have no main bus and pmu is in root like all >> others devices. >> (Any reason no to have main bus? Does it mean that there is no bus or >> that all >> devices are accessible?) > > That seems really wrong in general. Any memory mapped device is on a bus > of some kind. I'm not sure the reasoning. Perhaps Stephen can explain.
I saw no need to have add a bus node (there wasn't one before I started touching DT on Tegra); the top-level of the DT represents the CPU's entire view of the address space and has #address-cells/#size-cells, so devices get probed there just fine, whether they're addressed MMIO devices or not. _______________________________________________ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss