From: Juergen Beisert <j...@pengutronix.de>

Instead of hardcoding the ref_xtal in the clk driver, get it from the DT.

Signed-off-by: Juergen Beisert <j...@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumt...@pengutronix.de>
---
 arch/arm/boot/dts/imx28.dtsi | 11 +++++++++++
 drivers/clk/mxs/clk-imx28.c  | 16 +++++++++++++++-
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 7ba4966..b9e3712 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -37,6 +37,17 @@
                };
        };
 
+       clocks {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               osc24m: system-oscillator {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <24000000>;
+               };
+       };
+
        apb@80000000 {
                compatible = "simple-bus";
                #address-cells = <1>;
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 76ce6c6..01048b5 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -158,7 +158,21 @@ int __init mx28_clocks_init(void)
 
        clk_misc_init();
 
-       clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
+       /* retrieve the crystal's frequencies from device tree */
+       for_each_compatible_node(np, NULL, "fixed-clock") {
+               u32 rate;
+
+               if (of_property_read_u32(np, "clock-frequency", &rate))
+                       continue;
+
+               if (of_device_is_compatible(np, "fsl,mxs-system"))
+                       clks[ref_xtal] = mxs_clk_fixed("ref_xtal", rate);
+       }
+
+       /* if not set, guess their frequency */
+       if (clks[ref_xtal] == NULL)
+               clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
+
        clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000);
        clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000);
        clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000);
-- 
1.8.2.rc2

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