With recent support for true irqchip and clocksource drivers for Orion
SoCs, now make use of it on DT enabled Dove boards.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com>
---
Cc: Grant Likely <grant.lik...@linaro.org>
Cc: Rob Herring <rob.herr...@calxeda.com>
Cc: Rob Landley <r...@landley.net>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: John Stultz <john.stu...@linaro.org>
Cc: Russell King <li...@arm.linux.org.uk>
Cc: Jason Cooper <ja...@lakedaemon.net>
Cc: Andrew Lunn <and...@lunn.ch>
Cc: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Cc: Gregory Clement <gregory.clem...@free-electrons.com>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker...@vger.kernel.org
---
 arch/arm/boot/dts/dove.dtsi |   21 +++++++++++++++++++--
 1 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 8612658..8d5be1e8 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -30,11 +30,28 @@
                        marvell,tauros2-cache-features = <0>;
                };
 
-               intc: interrupt-controller {
+               timer: timer@20300 {
+                       compatible = "marvell,orion-timer";
+                       reg = <0x20300 0x20>;
+                       interrupt-parent = <&bridge_intc>;
+                       interrupts = <1>, <2>;
+                       clocks = <&core_clk 0>;
+               };
+
+               intc: main-interrupt-ctrl@20200 {
                        compatible = "marvell,orion-intc";
                        interrupt-controller;
                        #interrupt-cells = <1>;
-                       reg = <0x20204 0x04>, <0x20214 0x04>;
+                       reg = <0x20200 0x10>, <0x20210 0x10>;
+               };
+
+               bridge_intc: bridge-interrupt-ctrl@20110 {
+                       compatible = "marvell,orion-bridge-intc";
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       reg = <0x20110 0x8>;
+                       interrupts = <0>;
+                       marvell,#interrupts = <5>;
                };
 
                core_clk: core-clocks@d0214 {
-- 
1.7.2.5

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