On Monday, July 1, 2013 at 6:08 PM, Pratyush Anand wrote:
> On 7/1/2013 12:45 PM, Sean Cross wrote:
> > This adds a PCI Express port driver for the on-chip PCI Express port
> > present on the i.MX6 SoC. It is based on the PCI Express driver available
> > in the Freescale BSP.
> >
> > Signed-off-by: Sean Cross <x...@kosagi.com (mailto:x...@kosagi.com)>
> > ---
>
>
>
> ...
>
> > diff --git a/drivers/pci/pcie/pcie-imx.c b/drivers/pci/pcie/pcie-imx.c
> > new file mode 100644
> > index 0000000..664679e
> > --- /dev/null
> > +++ b/drivers/pci/pcie/pcie-imx.c
>
>
>
> Should go to drivers/pci/host/
I'll pull from arm-soc rather than from Linus' tree and place the driver there
instead.
> > @@ -0,0 +1,1049 @@
> > +/*
> > + * drivers/pci/pcie/pcie-imx.c
> > + *
>
>
>
> ...
>
>
> > +#define ATU_R_BaseAddress 0x900
> > +#define PCIE_PL_iATUVR (ATU_R_BaseAddress + 0x0)
> > +#define PCIE_PL_iATURC1 (ATU_R_BaseAddress + 0x4)
> > +#define PCIE_PL_iATURC2 (ATU_R_BaseAddress + 0x8)
> > +#define PCIE_PL_iATURLBA (ATU_R_BaseAddress + 0xC)
> > +#define PCIE_PL_iATURUBA (ATU_R_BaseAddress + 0x10)
> > +#define PCIE_PL_iATURLA (ATU_R_BaseAddress + 0x14)
> > +#define PCIE_PL_iATURLTA (ATU_R_BaseAddress + 0x18)
> > +#define PCIE_PL_iATURUTA (ATU_R_BaseAddress + 0x1C)
>
>
>
> I may be wrong, but from these offset it seems to me that it is SNPS
> controller. If yes, then please go through comments of
> "[PATCH V1-10 0/4] PCIe support for Samsung Exynos5440 SoC"
Exynos5440 appears to use the same port logic controller. However, the PHYs
are different. I'm not exactly certain which comments you want me to notice in
that series of patchsets, but I see references to splitting Exynos-specific
code into its own project. Based on that, it seems like the best approach
would be to:
1) Move Exynos code into its own file, say, pcie-exynos.c. This would
leave only Synopsys-specific ATC code in pcie-designware.c
2) Rename generic exynos functions to reflect the fact that they're
designware-generic functions.
3) Have pcie-imx.c reference this generic designware ATC code.
I'll rework the patch and re-submit it following these three changes.
--
Sean Cross
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