Hi Sekhar,
On Mon, Nov 25, 2013 at 4:04 PM, Sekhar Nori <nsek...@ti.com> wrote:
> Prabhakar,
>
> On Monday 25 November 2013 09:42 AM, Prabhakar Lad wrote:
>> Hi Taras,
>>
>> On Fri, Nov 22, 2013 at 3:38 PM, Taras Kondratiuk
>> <taras.kondrat...@linaro.org> wrote:
>>> On 21 November 2013 20:15, Prabhakar Lad <prabhakar.cse...@gmail.com> wrote:
>>>> From: "Lad, Prabhakar" <prabhakar.cse...@gmail.com>
>>>>
>>>> This patch replaces the __raw_readl/writel with
>>>> readl and writel, Altough the code runs on ARMv5
>>>> based SOCs, changing this will help copying the code
>>>> for other uses.
>>>
>>> This replacement has a functional impact: it adds memory barriers.
>>> Please note this in the description.
>>> Also please add a bit of explanation on why do you need to add barriers.
>>>
>> Agreed this adds memory barriers, I'll add a note about it.
>
> Well the barriers certainly make it easier to debug by having both
> device and memory accesses happen in program order. That said, if there
> is no pressing reason to add barriers, you can use
> {readl|writel}_relaxed() instead. That will make the code protable
> across endianess.
>
OK will use {readl|writel}_relaxed() instead.
Regards,
--Prabhakar Lad
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