On Tue, Feb 18, 2014 at 09:46:46PM +0100, Markus Pargmann wrote: > On Tue, Feb 18, 2014 at 10:23:29AM +0900, Mark Brown wrote:
> > Looking at the code the clock isn't physically optional, why not make it > > mandatory? There's only one mainline user, it looks like it should be > > straightforward to update with a fixed clock. > The masterclock is physically optional. There are several modes to use > this codec without master clock. The PLL can use different clock inputs, > BCLK, MCLK, etc. and even the PLL is not necessary. Instead BCLK and so > on can be used as direct codec clock input. However, most of this is not > supported by the driver yet and I can't test these cases. Are any of these modes supported by the driver yet? If there's modes that don't use MCLK supported then I'd expect them to only enable MCLK if it's actively being used in the current configuration (triggered via set_sysclk()).
signature.asc
Description: Digital signature
