From: Thor Thayer <ttha...@altera.com>
Addition of the Altera SDRAM controller registers to the
Altera SoC project. These registers are shared by future
drivers such as ECC and the FPGA bridge.
Signed-off-by: Thor Thayer <ttha...@altera.com>
To: Rob Herring <rob.herr...@calxeda.com>
To: Pawel Moll <pawel.m...@arm.com>
To: Mark Rutland <mark.rutl...@arm.com>
To: Ian Campbell <ijc+devicet...@hellion.org.uk>
To: Kumar Gala <ga...@codeaurora.org>
To: Rob Landley <r...@landley.net>
To: Russell King <li...@arm.linux.org.uk>
To: Dinh Nguyen <dingu...@altera.com>
Cc: devicetree@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
---
arch/arm/mach-socfpga/socfpga.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 21d6026..d514e8a 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -32,6 +32,7 @@
void __iomem *socfpga_scu_base_addr = ((void __iomem
*)(SOCFPGA_SCU_VIRT_BASE));
void __iomem *sys_manager_base_addr;
void __iomem *rst_manager_base_addr;
+void __iomem *sdr_ctl_base_addr;
void __iomem *clk_mgr_base_addr;
unsigned long cpu1start_addr;
@@ -150,6 +151,15 @@ void __init socfpga_sysmgr_init(void)
np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr");
clk_mgr_base_addr = of_iomap(np, 0);
+
+ np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl");
+ if (!np) {
+ pr_err("SOCFPGA: Unable to find sdr-ctl\n");
+ return;
+ }
+
+ sdr_ctl_base_addr = of_iomap(np, 0);
+ WARN_ON(!sdr_ctl_base_addr);
}
static void __init socfpga_init_irq(void)
--
1.7.9.5
--
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