On Mon, 2014-05-05 at 17:52 -0500, Thor Thayer wrote: > From: Thor Thayer <ttha...@altera.com> > > --- > v2: Use the SDRAM controller registers to calculate memory size > instead of the Device Tree. Update To & Cc list. Add maintainer > information. > > v3: EDAC driver cleanup based on comments from Mailing list. > > Signed-off-by: Thor Thayer <ttha...@altera.com> > --- > MAINTAINERS | 5 + > drivers/edac/Kconfig | 9 + > drivers/edac/Makefile | 2 + > drivers/edac/altera_edac.c | 411 > ++++++++++++++++++++++++++++++++++++++++++++ > 4 files changed, 427 insertions(+) > create mode 100644 drivers/edac/altera_edac.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index e67ea24..ecd1277 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1290,6 +1290,11 @@ M: Dinh Nguyen <dingu...@altera.com> > S: Maintained > F: drivers/clk/socfpga/ > > +ARM/SOCFPGA SDRAM EDAC SUPPORT > +M: Thor Thayer <ttha...@altera.com> > +S: Maintained > +F: drivers/edac/altera_edac.c > + > ARM/STI ARCHITECTURE > M: Srinivas Kandagatla <srinivas.kandaga...@gmail.com> > M: Maxime Coquelin <maxime.coque...@st.com> > diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig > index 878f090..4f4d379 100644 > --- a/drivers/edac/Kconfig > +++ b/drivers/edac/Kconfig > @@ -368,4 +368,13 @@ config EDAC_OCTEON_PCI > Support for error detection and correction on the > Cavium Octeon family of SOCs. > > +config EDAC_ALTERA_MC > + bool "Altera SDRAM Memory Controller EDAC"
Can this be tristate? Dinh -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html