Doug Anderson <diand...@google.com> writes: > Tushar, > > On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera <tusha...@samsung.com> wrote: >> Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux. >> As per the user manual, it should be CLK_MAU_EPLL. >> >> The problem surfaced when the bootloader in Peach-pit board set >> the EPLL clock as the parent of AUDSS mux. While booting the kernel, >> we used to get a system hang during late boot if CLK_MAU_EPLL was >> disabled. >> >> Signed-off-by: Tushar Behera <tusha...@samsung.com> >> Signed-off-by: Shaik Ameer Basha <shaik.am...@samsung.com> >> Reported-by: Kevin Hilman <khil...@linaro.org> >> --- >> arch/arm/boot/dts/exynos5420.dtsi | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) > > I've tested this myself now as well. > > Tested-by: Doug Anderson <diand...@chromium.org>
For me, this patch alone (on top of -next) doesn't solve the boot hang. I still need clk_ignore_unused for a successful boot. So, this patch might be correct, but it doesn't prevent a boot hang using a chain-loaded nv_uboot on peach-pi. There's still another clock being disabled that causes a hang. Kevin -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
